DM385, DM388
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SPRS821D –MARCH 2013–REVISED DECEMBER 2013
8.19 Universal Asynchronous Receiver/Transmitter (UART)
The UART performs serial-to-parallel conversions on data received from a peripheral device and parallel-
to-serial conversion on data received from the CPU. The device provides up to three UART peripheral
interfaces, depending on the selected pin multiplexing.
Each UART has the following features:
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Selectable UART/IrDA (SIR/MIR)/CIR modes
Dual 64-entry FIFOs for received and transmitted data payload
Programmable and selectable transmit and receive FIFO trigger levels for DMA and interrupt
generation
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Baud-rate generation based upon programmable divisors N (N=1…16384)
Two DMA requests and one interrupt request to the system
Can connect to any RS-232 compliant device.
UART functions include:
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Baud-rate up to 3.6 Mbit/s on UART0, UART1, and UART2
Programmable serial interfaces characteristics
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5, 6, 7, or 8-bit characters
Even, odd, or no parity-bit generation and detection
1, 1.5, or 2 stop-bit generation
Flow control: hardware (RTS/CTS) or software (XON/XOFF)
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Additional modem control functions (UART0_DTR, UART0_DSR, UART0_DCD, and UART0_RIN) for
UART0 only; UART1 and UART2 do not support full-flow control signaling.
IR-IrDA functions include:
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Support of IrDA 1.4 slow infrared (SIR, baud-rate up to 115.2 Kbits/s), medium infrared (MIR, baud-
rate up to 1.152 Mbits/s) and fast infrared (FIR baud-rate up to 4.0 Mbits/s) communications
Supports framing error, cyclic redundancy check (CRC) error, illegal symbol (FIR), and abort pattern
(SIR, MIR) detection
8-entry status FIFO (with selectable trigger levels) available to monitor frame length and frame errors.
IR-CIR functions include:
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Consumer infrared (CIR) remote control mode with programmable data encoding
Free data format (supports any remote control private standards)
Selectable bit rate and configurable carrier frequency.
For more detailed information on the UART peripheral, see the UART/IrDA/CIR Module chapter in the
device-specific Technical Reference Manual.
8.19.1 UART Peripheral Register Descriptions
The UART peripheral registers are described in the device-specific Technical Reference Manual. Each
register is documented as an offset from a base address for the peripheral. The base addresses for all of
the peripherals are in the device memory map (see Section 2.10).
Copyright © 2013, Texas Instruments Incorporated
Peripheral Information and Timings
269
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