ELECTRICAL CHARACTERISTICS (Cont.)
At TA = +25°C, +VA = +5V, +VD = +5V, differential transformer coupled output, 50Ω doubly terminated, unless otherwise specified.
DAC908U/E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC PERFORMANCE (Cont.)
Output Settling Time(2)
Output Rise Time(2)
to 0.1%
10% to 90%
10% to 90%
30
2
2
ns
ns
ns
Output Fall Time(2)
Glitch Impulse
3
pV-s
DC-ACCURACY
Full-Scale Output Range(3)(FSR)
Output Compliance Range
Gain Error
Gain Error
Gain Drift
All Bits High, IOUT
2.0
–1.0
–10
–10
20.0
+1.25
+10
mA
V
With Internal Reference
With External Reference
With Internal Reference
With Internal Reference
With Internal Reference
±1
±2
±120
%FSR
%FSR
ppmFSR/°C
%FSR
ppmFSR/°C
%FSR/V
%FSR/V
pA/√Hz
kΩ
+10
Offset Error
Offset Drift
–0.025
+0.025
±0.1
Power-Supply Rejection, +VA
Power- Supply Rejection, +VD
Output Noise
Output Resistance
Output Capacitance
–0.2
–0.025
+0.2
+0.025
I
OUT = 20mA, RLOAD = 50Ω
50
200
12
I
OUT, IOUT to Ground
pF
REFERENCE
Reference Voltage
Reference Tolerance
+1.24
±5
V
%
Reference Voltage Drift
Reference Output Current
Reference Input Resistance
Reference Input Compliance Range
Reference Small-Signal Bandwidth(4)
±50
10
1
ppmFSR/°C
µA
MΩ
V
0.1
1.25
1.3
MHz
DIGITAL INPUTS
Logic Coding
Straight Binary
Latch Command
Rising Edge of Clock
Logic High Voltage, VIH
Logic Low Voltage, VIL
Logic High Voltage, VIH
Logic Low Voltage, VIL
+VD = +5V
+VD = +5V
+VD = +3V
+VD = +3V
+VD = +5V
+VD = +5V
3.5
2
5
0
3
V
V
V
1.2
0.8
0
V
(5)
Logic High Current, IIH
±20
±20
5
µA
µA
pF
Logic Low Current, IIL
Input Capacitance
POWER SUPPLY
Supply Voltages
+VA
+VD
+2.7
+2.7
+5
+5
+5.5
+5.5
V
V
Supply Current(6)
IVA
24
1.1
8
170
50
45
30
2
15
230
mA
mA
mA
mW
mW
mW
IVA, Power-Down Mode
IVD
Power Dissipation
+5V, IOUT = 20mA
+3V, IOUT = 2mA
Power Dissipation, Power-Down Mode
Thermal Resistance, θJA
SO-28
75
50
°C/W
°C/W
TSSOP-28
NOTES: (1) At output IOUT, while driving a virtual ground. (2) Measured single-ended into 50Ω Load. (3) Nominal full-scale output current is 32x IREF; see Application
Section for details. (4) Reference bandwidth depends on size of external capacitor at the BW pin and signal level. (5) Typically 45µA for the PD pin, which has an
internal pull-down resistor. (6) Measured at fCLOCK = 50MSPS and fOUT = 1.0MHz.
DAC908
SBAS109B
3
TI [ TEXAS INSTRUMENTS ]
