Optional
Bandlimiting
Capacitor
+5V
CCOMPEXT
0.1µF
+5V
CCOMPEXT
0.1µF
BW
+VA
DAC904
BW
+VA
DAC904
VREF
RSET
VREF
RSET
IREF
=
IREF
=
FSA
FSA
Ref
Control
Amp
Current
Sources
Ref
Control
Amp
Current
Sources
REFIN
External
Reference
REFIN
CCOMP
400pF
RSET
CCOMP
400pF
2kΩ
INT/EXT
RSET
0.1µF
+5V
INT/EXT
+1.24V Ref.
+1.24V Ref.
FIGURE 8. External Reference Configuration.
FIGURE 7. Internal Reference Configuration.
Using the internal reference, a 2kΩ resistor value results in a
20mA full-scale output. Resistors with a tolerance of 1% or
better should be considered. Selecting higher values, the con-
verter output can be adjusted from 20mA down to 2mA.
Operating the DAC904 at lower than 20mA output currents may
be desirable for reasons of reducing the total power consump-
tion, improving the distortion performance, or observing the
output compliance voltage limitations for a given load condition.
DIGITAL INPUTS
The digital inputs, D0 (LSB) through D13 (MSB) of the
DAC904 accepts standard-positive binary coding. The digital
input word is latched into a master-slave latch with the rising
edge of the clock. The DAC output becomes updated with
the following falling clock edge (refer to the electrical charac-
teristic table and timing diagram for details). The best perfor-
mance will be achieved with a 50% clock duty cycle, how-
ever, the duty cycle may vary as long as the timing specifi-
cations are met. Additionally, the setup and hold times may
be chosen within their specified limits.
It is recommended to bypass the REFIN pin with a ceramic chip
capacitor of 0.1µF or more. The control amplifier is internally
compensated, and its small signal bandwidth is approximately
1.3MHz. For optional ac performance, an additional capacitor
(CCOMPEXT) should be applied between the BW pin and the
analog supply, +VA, as shown in Figure 7. Using a 0.1µF
capacitor, the small-signal bandwidth and output impedance of
the control amplifier is further diminished, reducing the noise
that is fed into the current source array. This also helps shunting
feedthrough signals more effectively, and improving the noise
performance of the DAC904.
All digital inputs are CMOS compatible. The logic thresholds
depend on the applied digital supply voltage such that they
are set to approximately half the supply voltage;
Vth = +VD/2 (±20% tolerance). The DAC904 is designed to
operate over a supply range of 2.7V to 5.5V.
POWER-DOWN MODE
The DAC904 features a power-down function that can be
used to reduce the supply current to less than 9mA over the
specified supply range of 2.7V to 5.5V. Applying a logic HIGH
to the PD pin will initiate the power-down mode, while a logic
LOW enables normal operation. When left unconnected, an
internal active pull-down circuit will enable the normal opera-
tion of the converter.
EXTERNAL REFERENCE OPERATION
The internal reference can be disabled by applying a logic
HIGH (+VA) to pin INT/EXT. An external reference voltage
can then be driven into the REFIN pin, which in this case
functions as an input, as shown in Figure 8. The use of an
external reference may be considered for applications that
require higher accuracy and drift performance, or to add the
ability of dynamic gain control.
GROUNDING, DECOUPLING, AND
LAYOUT INFORMATION
While a 0.1µF capacitor is recommended to be used with the
internal reference, it is optional for the external reference
operation. The reference input, REFIN, has a high input
impedance (1MΩ) and can easily be driven by various
sources. Note that the voltage range of the external refer-
ence should stay within the compliance range of the refer-
ence input (0.1V to 1.25V).
Proper grounding and bypassing, short lead length, and the
use of ground planes are particularly important for high
frequency designs. Multilayer pc-boards are recommended
for best performance since they offer distinct advantages
such as minimization of ground impedance, separation of
signal layers by ground layers, etc.
DAC904
14
SBAS095C
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