PIN CONFIGURATION
Top View
DIP
PIN DESCRIPTION
PIN
1
LABEL
V
DD
CS
CLK
SDI
LD
DESCRIPTION
Power Supply
Chip Select (active LOW).
Synchronous Clock for the Serial Data Input.
Serial Data Input. Data is clocked into the internal
serial register on the rising edge of CLK.
Loads the Internal DAC Register. NOTE: The DAC
register is a transparent latch and is transparent
when LD is LOW (regardless of the state of CS or
CLK).
Asynchronous Input to Clear the DAC Register.
When CLR is strobbed LOW, the DAC register is set
to 000
H
and the output voltage to 0V.
Ground
Voltage Output. Fixed output voltage range of ap-
proximately 0V to 4.095V (1mV/LSB). The internal
reference maintains this output range over time,
temperature, and power supply variations (within
the values defined in the specifications section).
V
DD
CS
CLK
SDI
1
2
3
4
DAC7611
8
7
6
5
V
OUT
GND
CLR
LD
2
3
4
5
6
CLR
PIN CONFIGURATION
Top View
SOIC
7
8
GND
V
OUT
V
DD
CS
CLK
SDI
1
2
3
4
DAC7611
8
7
6
5
V
OUT
GND
CLR
LD
ELECTROSTATIC
DISCHARGE SENSITIVITY
ABSOLUTE MAXIMUM RATINGS
(1)
V
DD
to GND .......................................................................... –0.3V to 6V
Digital Inputs to GND ............................................. –0.3V to V
DD
+ 0.3V
V
OUT
to GND ........................................................... –0.3V to V
DD
+ 0.3V
Power Dissipation ........................................................................ 325mW
Thermal Resistance,
θ
JA
............................................................ 150°C/W
Maximum Junction Temperature ................................................. +150°C
Operating Temperature Range ...................................... –40°C to +85°C
Storage Temperature Range ........................................ –65°C to +150°C
Lead Temperature (soldering, 10s) ............................................. +300°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION
MINIMUM
RELATIVE
ACCURACY
(LSB)
±2
±2
±1
±1
DIFFERENTIAL
NONLINEARITY
(LSB)
±1
±1
±1
±1
SPECIFICATION
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
PACKAGE
DRAWING
NUMBER
(1)
006
182
PRODUCT
DAC7611P
DAC7611U
PACKAGE
8-Pin DIP
8-Lead SOIC
ORDERING
NUMBER
(2)
DAC7611P
DAC7611U
DAC7611U/2K5
DAC7611PB
DAC7611UB
DAC7611UB/2K5
TRANSPORT
MEDIA
Rails
Rails
Tape and Reel
Rails
Rails
Tape and Reel
"
DAC7611PB
DAC7611UB
"
"
"
"
"
–40°C to +85°C
–40°C to +85°C
"
8-Pin DIP
8-Lead SOIC
"
006
182
"
"
"
"
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are
available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “DAC7611/2K5” will get a single
2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
®
3
DAC7611
TI [ TEXAS INSTRUMENTS ]
