ABSOLUTE MAXIMUM RATINGS
(1)
+V
CC
to Common .................................................................... 0V to +17V
–V
CC
to Common .................................................................... 0V to –17V
+V
CC
to –V
CC
....................................................................................... 34V
ACOM to DCOM ...............................................................................
±0.5V
Digital Inputs to Common ............................................. –1V to (V
CC
–0.7V)
External Voltage Applied to BPO and Range Resistors ....................
±V
CC
V
REF OUT
.......................................................... Indefinite Short to Common
V
OUT
............................................................... Indefinite Short to Common
SDO ............................................................... Indefinite Short to Common
Power Dissipation .......................................................................... 750mW
Storage Temperature ...................................................... –60°C to +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
NOTE: (1) Stresses above those listed under
Absolute Maximum Ratings
may
cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
For the most current package and ordering information, see
the Package Option Addendum at the end of this document,
or see the TI website at www.ti.com.
PIN CONFIGURATION
Top View
CLK
A
0
A
1
SDI
SDO
DCOM
+V
CC
ACOM
1
2
3
4
DAC714
5
6
7
8
12 V
REF OUT
11 R
BPO
10 R
FB2
9
V
OUT
16 CLR
15 –V
CC
14 Gain Adjust
13 Offset Adjust
SO/DIP
PIN DESCRIPTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LABEL
CLK
A
0
A
1
SDI
SDO
DCOM
+V
CC
ACOM
V
OUT
R
FB2
R
BPO
V
REF OUT
Offset Adjust
Gain Adjust
–V
CC
CLR
DESCRIPTION
Serial Data Clock
Enable for Input Register (Active Low)
Enable for D/A Latch (Active Low)
Serial Data Input
Serial Data Output
Digital Ground
Positive Power Supply
Analog Ground
D/A Output
±10V
Range Feedback Output
Bipolar Offset
Voltage Reference Output
Offset Adjust
Gain Adjust
Negative Power Supply
Clear
2
DAC714
www.ti.com
SBAS032A
TI [ TEXAS INSTRUMENTS ]
