DAC712
www.ti.com ................................................................................................................................................. SBAS023A–SEPTEMBER 2000–REVISED JULY 2009
DISCUSSION OF SPECIFICATIONS
LINEARITY ERROR
TOTAL HARMONIC DISTORTION + NOISE
Linearity error is defined as the deviation of the
analog output from a straight line drawn between the
end points of the transfer characteristic.
Total harmonic distortion + noise is defined as the
ratio of the square root of the sum of the squares of
the values of the harmonics and noise to the value of
the fundamental frequency. It is expressed in % of
the fundamental frequency amplitude at sampling rate
fS.
DIFFERENTIAL LINEARITY ERROR
Differential linearity error (DLE) is the deviation from
1LSB of an output change from one adjacent state to
the next. A DLE specification of ±1/2LSB means that
the output step size can range from 1/2LSB to
3/2LSB when the digital input code changes from one
code word to the adjacent code word. If the DLE is
more positive than –1LSB, the D/A converter is said
to be monotonic.
SIGNAL-TO-NOISE AND DISTORTION RATIO
(SINAD)
SINAD includes all the harmonic and outstanding
spurious components in the definition of output noise
power in addition to quantizing and internal random
noise power. SINAD is expressed in dB at a specified
input frequency and sampling rate, fS.
MONOTONICITY
DIGITAL-TO-ANALOG GLITCH IMPULSE
A D/A converter is monotonic if the output either
increases or remains the same for increasing digital
input values. Monotonicity of the DAC712 is ensured
over the specified temperature range to 13, 14, 15,
and 16 bits for performance grades DAC712P/U,
DAC712PB/UB, DAC712PK/UK, and DAC712PL/UL,
respectively.
The amount of charge injected into the analog output
from the digital inputs when the inputs change state.
It is measured at half-scale at the input codes where
as many switches as possible change state—from
7FFFh to 8000h.
DIGITAL FEEDTHROUGH
SETTLING TIME
When the analog-to-digital (A/D) converter is not
selected, high-frequency logic activity on the digital
inputs is coupled through the device and shows up as
output noise. This noise is digital feedthrough.
Settling time is the total time (including slew time) for
the D/A output to settle to within an error band
around its final value after a change in input. Settling
times are specified to within ±0.003% of Full-Scale
Range (FSR) for an output step change of 20V and
1LSB. The 1LSB change is measured at the Major
Carry (FFFFh to 0000h, and 0000h to FFFFh: BTC
codes), the input transition at which worst-case
settling time occurs.
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