CD54HC153, CD74HC153, CD54HCT153, CD74HCT153
DC Electrical Specifications
(Continued)
TEST
CONDITIONS
PARAMETER
HCT TYPES
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
I
I
I
CC
∆I
CC
(Note 2)
V
CC
and
GND
V
CC
or
GND
V
CC
-2.1
V
OL
V
IH
or V
IL
V
IH
V
IL
V
OH
-
-
V
IH
or V
IL
-
-
-0.02
4.5 to
5.5
4.5 to
5.5
4.5
2
-
4.4
-
-
-
-
0.8
-
2
-
4.4
-
0.8
-
2
-
4.4
-
0.8
-
V
V
V
SYMBOL
V
I
(V)
I
O
(mA)
25
o
C
MIN
TYP
MAX
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
MIN
MAX
MIN
MAX
UNITS
V
CC
(V)
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
0
0
-
5.5
5.5
4.5 to
5.5
-
-
-
-
-
100
±0.1
8
360
-
-
-
±1
80
450
-
-
-
±1
160
490
µA
µA
µA
NOTE:
2. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
Data
Enable
Select
UNIT LOADS
0.45
0.6
1.35
NOTE: Unit Load is
∆I
CC
limit specified in DC Electrical Table, e.g.
360µA max at 25
o
C.
Switching Specifications
Input t
r
, t
f
= 6ns
TEST
SYMBOL CONDITIONS
V
CC
(V)
25
o
C
MIN
TYP
MAX
-40
o
C TO
85
o
C
MIN
MAX
-55
o
C TO
125
o
C
MIN
MAX
UNITS
PARAMETER
HC TYPES
Propagation Delay (Figure 1)
S to Y
t
PLH,
t
PHL
C
L
= 50pF
2
4.5
-
-
-
-
-
-
13
-
160
32
-
27
-
-
-
-
200
40
-
34
-
-
-
-
240
48
-
41
ns
ns
ns
ns
C
L
=15pF
C
L
= 50pF
5
6
4