CD4541B
Functional Diagram
12
A
13
B
1
R
TC
2
C
TC
3
R
S
5
AR
6
MR
10
MODE
9
Q/Q
SELECT
8
Q
V
DD
= PIN 14
V
SS
= PIN 7
12
13
†
A
†
B
R
N
P
1 OF 3
MUX
2
16
2
10
2
13
OSC
8-STAGE
COUNTER
R
R
OR
2
8
Q
8
N
P
3
9
†
Q/Q SELECT
V
DD
†
R
S
†
C
TC
†
R
TC
2
1
8-STAGE
COUNTER
R
10
†
MODE
AUTO
RESET
†
5
PWR ON
RESET
6
V
DD
= 14
V
SS
= 7
NC = 4, 11
V
SS
†
All inputs are protected by CMOS Protection Network.
MANUAL RESET
†
FIGURE 1.
FREQUENCY SELECTION TABLE
A
0
0
1
1
B
0
1
0
1
NO. OF
STAGES N
13
10
8
16
TRUTH TABLE
STATE
PIN
5
6
9
10
0
Auto Reset On
Master Reset Off
Output Initially Low After
Reset (Q)
Single Transition Mode
1
Auto Reset Disable
Master Reset On
Output Initially High After
Reset (Q)
Recycle Mode
FIGURE 2. RC OSCILLATOR CIRCUIT
R
TC
COUNT 2
N
8192
1024
256
65536
C
TC
2
1
R
S
INTERNAL
RESET
3
TO CLOCK
CKT
2