Data sheet acquired from Harris Semiconductor
SCHS115D – Revised September 2003
The CD4093B types are supplied in 14-lead
hermetic dual-in-line ceramic packages (F3A
suffix), 14-lead dual-in-line plastic packages (E
suffix), 14-lead small-outline packages (M, MT,
M96, and NSR suffixes), and 14-lead thin shrink
small-outline packages (PW and PWR suffixes).
PACKAGE THERMAL IMPEDANCE,
θ
JA
(See Note 1):
E package
. . . . . . . . . . . . . . . . . . . . . . .
M package
. . . . . . . . . . . . . . . . . . . . . . .
NS package
. . . . . . . . . . . . . . . . . . . . . .
............................
............................
............................
80°C/W
86°C/W
76°C/W
NOTE 1:
Package thermal impedance is calculated in accordance with JESD 51-7.
V
DD
V
DD
V
OH
V
P
V
N
V
OL
V
SS
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2003 Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
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