欢迎访问ic37.com |
会员登录 免费注册
发布采购

CD4052BM96G4 参数 Datasheet PDF下载

CD4052BM96G4图片预览
型号: CD4052BM96G4
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS模拟多路复用器/多路解复用器与逻辑电平转换 [CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion]
分类和应用: 解复用器
文件页数/大小: 25 页 / 683 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号CD4052BM96G4的Datasheet PDF文件第1页浏览型号CD4052BM96G4的Datasheet PDF文件第2页浏览型号CD4052BM96G4的Datasheet PDF文件第3页浏览型号CD4052BM96G4的Datasheet PDF文件第4页浏览型号CD4052BM96G4的Datasheet PDF文件第6页浏览型号CD4052BM96G4的Datasheet PDF文件第7页浏览型号CD4052BM96G4的Datasheet PDF文件第8页浏览型号CD4052BM96G4的Datasheet PDF文件第9页  
CD4051B, CD4052B, CD4053B  
Absolute Maximum Ratings  
Supply Voltage (V+ to V-)  
Voltages Referenced to V Terminal . . . . . . . . . . . -0.5V to 20V  
DC Input Voltage Range . . . . . . . . . . . . . . . . . . -0.5V to V  
DD  
Thermal Information  
Package Thermal Impedance, θ (see Note 1):  
JA  
E (PDIP) package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 C/W  
M (SOIC) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 C/W  
NS (SOP) package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 C/W  
PW (TSSOP) package . . . . . . . . . . . . . . . . . . . . . . . . . . 108 C/W  
Maximum Junction Temperature (Ceramic Package) . . . . . . . . .175 C  
Maximum Junction Temperature (Plastic Package) . . . . . . . .150 C  
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C  
o
SS  
o
+0.5V  
o
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . ±10mA  
o
o
Operating Conditions  
o
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C  
o
o
o
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .265 C  
(SOIC - Lead Tips Only)  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. The package thermal impedance is calculated in accordance with JESD 51-7.  
Electrical Specifications Common Conditions Here: If Whole Table is For the Full Temp. Range, V  
= ±5V, A = +1,  
SUPPLY  
V
R
= 100, Unless Otherwise Specified (Note 3)  
L
o
CONDITIONS  
LIMITS AT INDICATED TEMPERATURES ( C)  
25  
PARAMETER  
V
(V)  
V
(V)  
V
(V)  
V
(V)  
-55  
-40  
85  
125  
MIN  
TYP  
MAX  
UNITS  
IS  
EE  
SS  
DD  
SIGNAL INPUTS (V ) AND OUTPUTS (V  
)
IS  
OS  
Quiescent Device  
Current, I Max  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5
5
10  
20  
100  
800  
310  
200  
-
5
10  
20  
100  
850  
330  
210  
-
150  
300  
600  
3000  
1200  
520  
300  
-
150  
300  
600  
3000  
1300  
550  
320  
-
-
-
-
-
-
-
-
-
-
-
-
0.04  
0.04  
0.04  
0.08  
470  
180  
125  
15  
5
10  
20  
100  
1050  
400  
240  
-
µA  
µA  
µA  
µA  
DD  
-
10  
-
-
15  
20  
5
-
-
Drain to Source ON  
Resistance r Max  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ON  
10  
15  
5
0 V V  
IS DD  
Change in ON  
Resistance (Between  
Any Two Channels),  
10  
15  
18  
-
-
-
-
10  
-
r  
ON  
-
-
-
-
5
-
OFF Channel Leakage  
Current: Any Channel  
OFF (Max) or ALL  
±100 (Note 2) ±1000 (Note 2)  
±0.01  
±100  
(Note 2)  
nA  
Channels OFF (Common  
OUT/IN) (Max)  
Capacitance:  
-
-5  
5-  
5
Input, C  
-
-
-
-
-
5
-
pF  
IS  
Output, C  
OS  
CD4051  
CD4052  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
30  
18  
9
-
-
-
pF  
pF  
pF  
CD4053  
Feedthrough  
C
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.2  
30  
15  
10  
-
pF  
ns  
ns  
ns  
IOS  
Propagation Delay Time  
(Signal Input to Output  
V
R
C
= 200k,  
= 50pF,  
5
60  
30  
20  
DD  
L
L
10  
15  
t , t = 20ns  
r
f
5
 复制成功!