CD4051B, CD4052B, CD4053B
Functional Block Diagrams (Continued)
CD4052B
X CHANNELS IN/OUT
3
2
1
0
11
15
14
12
TG
TG
TG
TG
TG
TG
TG
TG
V
16
DD
COMMON X
OUT/IN
13
10
9
A †
B †
BINARY
TO
1 OF 4
3
LOGIC
LEVEL
COMMON Y
OUT/IN
DECODER
WITH
CONVERSION
6
INHIBIT
INH †
1
0
5
1
2
2
4
3
8
7
V
V
EE
SS
Y CHANNELS IN/OUT
CD4053B
BINARY TO
1 OF 2
DECODERS
WITH
IN/OUT
by bx
LOGIC
LEVEL
CONVERSION
V
16
DD
cy
3
cx
5
ay
13
ax
12
INHIBIT
1
2
COMMON
OUT/IN
ax OR ay
TG
TG
TG
TG
TG
TG
14
11
A †
COMMON
OUT/IN
bx OR by
15
10
9
B †
C †
COMMON
OUT/IN
cx OR cy
4
6
INH †
V
DD
8
V
V
EE
7
SS
†All inputs are protected by standard CMOS protection network.
3
TI [ TEXAS INSTRUMENTS ]
