CD4051B, CD4052B, CD4053B
Test Circuits and Waveforms
(Continued)
V
DD
V
DD
V
DD
I
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CD4051
I
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CD4052
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CD4053
I
DD
FIGURE 13. OFF CHANNEL LEAKAGE CURRENT - ALL CHANNELS OFF
V
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OUTPUT
OUTPUT
16
15
14
13
12
11
10
9
CD4052
V
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CD4053
V
DD
OUTPUT
R
L
C
L
V
EE
V
DD
V
EE
V
SS
CD4051
V
SS
1
R
L
C
L
2
R
L
C
L
3
V
DD
V
EE
4
V
DD
5
V
EE
6
V
EE
V
SS
CLOCK
7
IN
8
V
SS
V
DD
V
EE
V
DD
V
SS
CLOCK
V
SS
IN
V
SS
V
SS
CLOCK
IN
V
SS
FIGURE 14. PROPAGATION DELAY - ADDRESS INPUT TO SIGNAL OUTPUT
OUTPUT
R
L
50pF
V
EE
V
DD
V
SS
V
DD
CLOCK V
EE
IN
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
OUTPUT
R
L
50pF
V
EE
V
DD
V
SS
V
DD
CLOCK V
EE
IN V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
OUTPUT
R
L
50pF
V
EE
V
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
V
DD
V
SS
CLOCK V
EE
IN V
SS
t
PHL
AND t
PLH
V
SS
CD4051
V
t
PHL
AND t
PLH SS
CD4052
V
t
PHL
AND t
PLH SS
CD4053
FIGURE 15. PROPAGATION DELAY - INHIBIT INPUT TO SIGNAL OUTPUT
V
DD
µA
1K
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
IL
V
DD
V
IH
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1K
µA
V
IH
V
IL
V
IH
V
IL
MEASURE < 2µA ON ALL
“OFF” CHANNELS (e.g., CHANNEL 2x)
MEASURE < 2µA ON ALL
“OFF” CHANNELS (e.g., CHANNEL by)
1K
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
µA
V
DD
1K
V
IH
V
IL
1K
V
IH
V
IL
1K
V
IH
V
IL
CD4051B
CD4052B
CD4053B
MEASURE < 2µA ON ALL
“OFF” CHANNELS (e.g., CHANNEL 6)
FIGURE 16. INPUT VOLTAGE TEST CIRCUITS (NOISE IMMUNITY)
10