SWRS084B
–
OCTOBER 2010
–
REVISED JULY 2011
RESET_N
XOSC_Q2
XOSC_Q1
P2_4
P2_3
P2_2
P2_1
P2_0
RESET
WATCHDOG
TIMER
ON-CHIP VOLTAGE
REGULATOR
POWER-ON RESET
BROWN OUT
SFR Bus
VDD (2 V–3.6 V)
DCOUPL
32-MHz
CRYSTAL OSC
32.768-kHz
CRYSTAL OSC
DEBUG
INTERFACE
CLOCK MUX
and
CALIBRATION
SLEEP TIMER
HIGH-
SPEED
RC-OSC
32-kHz
RC-OSC
POWER MANAGEMENT CONTROLLER
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
IRQ CTRL
P0_7
P0_6
P0_5
P0_4
DMA
8051 CPU
CORE
PDATA
XRAM
IRAM
SFR
RAM
SRAM
MEMORY
ARBITRATOR
FLASH
FLASH
UNIFIED
FLASH CTRL
ANALOG COMPARATOR
FIFOCTRL
1 KB SRAM
Radio Arbiter
P0_3
P0_2
P0_1
OP-AMP
SRAM
I/O CONTROLLER
P0_0
SFR Bus
DS
ADC
AUDIO/DC
AES
ENCRYPTION
AND
DECRYPTION
RADIO REGISTERS
Link Layer Engine
SYNTH
DEMODULATOR
MODULATOR
USB_N
USB_P
USB
USART 0
FREQUENCY
SYNTHESIZER
RECEIVE
USART 1
TRANSMIT
TIMER 1 (16-Bit)
TIMER 2
(BLE LL TIMER)
RF_P
RF_N
TIMER 3 (8-Bit)
DIGITAL
ANALOG
TIMER 4 (8-Bit)
MIXED
B0301-05
Copyright
©
2010–2011, Texas Instruments Incorporated
3
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