www.ti.com
..........................................................................................................................................................
SWRS081A – APRIL 2009 – REVISED APRIL 2009
ADC CHARACTERISTICS
T
A
= 25°C and VDD = 3 V, unless otherwise noted.
PARAMETER
Input voltage
External reference voltage
External reference voltage differential
Input resistance, signal
Full-scale signal
(1)
TEST CONDITIONS
VDD is voltage on AVDD5 pin
VDD is voltage on AVDD5 pin
VDD is voltage on AVDD5 pin
Using 4-MHz clock speed
Peak-to-peak, defines 0 dBFS
Single-ended input, 7-bit setting
Single-ended input, 9-bit setting
Single-ended input, 10-bit setting
ENOB
(1)
Effective number of bits
Single-ended input, 12-bit setting
Differential input, 7-bit setting
Differential input, 9-bit setting
Differential input, 10-bit setting
Differential input, 12-bit setting
Useful power bandwidth
THD
(1)
7-bit setting, both single and differential
Single-ended input, 12-bit setting, –6 dBFS
Total harmonic distortion
Differential input, 12-bit setting, –6 dBFS
Single-ended input, 12-bit setting
Signal to nonharmonic ratio
(1)
Differential input, 12-bit setting
Single-ended input, 12-bit setting, –6 dBFS
Differential input, 12-bit setting, –6 dBFS
CMRR
Common-mode rejection ratio
Crosstalk
Offset
Gain error
DNL
(1)
INL
(1)
Differential nonlinearity
Integral nonlinearity
12-bit setting, mean
12-bit setting, maximum
12-bit setting, mean
12-bit setting, maximum
Single-ended input, 7-bit setting
Single-ended input, 9-bit setting
Single-ended input, 10-bit setting
SINAD
(1)
(–THD+N)
Signal-to-noise-and-distortion
Single-ended input, 12-bit setting
Differential input, 7-bit setting
Differential input, 9-bit setting
Differential input, 10-bit setting
Differential input, 12-bit setting
7-bit setting
Conversion time
9-bit setting
10-bit setting
12-bit setting
Power consumption
Internal reference voltage
(1)
Measured with 300-Hz sine-wave input and VDD as reference.
9
Differential input, 12-bit setting, 1-kHz sine (0
dBFS), limited by ADC resolution
Single-ended input, 12-bit setting, 1-kHz sine (0
dBFS), limited by ADC resolution
Midscale
MIN
0
0
0
197
2.97
5.7
7.5
9.3
10.8
6.5
8.3
10.0
11.5
0–20
–75.
2
–86.
6
70.2
79.3
78.8
88.9
>84
>84
–3
0.68
0.05
0.9
4.6
13.3
35.4
46.8
57.5
66.6
40.7
51.6
61.8
70.8
20
36
68
132
1.2
1.15
mA
V
µs
dB
dB
dB
mV
%
LSB
LSB
dB
kHz
bits
TYP MAX
VDD
VDD
VDD
UNIT
V
V
V
kΩ
V
dB
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s):
TI [ TEXAS INSTRUMENTS ]
