欢迎访问ic37.com |
会员登录 免费注册
发布采购

CC1110F32RHHR 参数 Datasheet PDF下载

CC1110F32RHHR图片预览
型号: CC1110F32RHHR
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器,低于1GHz的射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, Sub-1 GHz RF Transceiver, and USB Controller]
分类和应用: 存储射频控制器
文件页数/大小: 249 页 / 3133 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号CC1110F32RHHR的Datasheet PDF文件第55页浏览型号CC1110F32RHHR的Datasheet PDF文件第56页浏览型号CC1110F32RHHR的Datasheet PDF文件第57页浏览型号CC1110F32RHHR的Datasheet PDF文件第58页浏览型号CC1110F32RHHR的Datasheet PDF文件第60页浏览型号CC1110F32RHHR的Datasheet PDF文件第61页浏览型号CC1110F32RHHR的Datasheet PDF文件第62页浏览型号CC1110F32RHHR的Datasheet PDF文件第63页  
CC1110Fx / CC1111Fx  
Mnemonic  
Program Branching  
ACALL addr11  
LCALL addr16  
RET  
Description  
Hex Opcode  
Bytes  
Cycles  
Absolute subroutine call  
xxx119  
0x12  
2
3
1
1
2
3
2
1
2
2
2
2
3
3
3
3
3
3
3
2
3
1
6
6
4
4
3
4
3
2
3
3
3
3
4
4
4
4
4
4
4
3
4
1
Long subroutine call  
Return from subroutine  
0x22  
RETI  
Return from interrupt  
0x32  
AJMP addr11  
LJMP addr16  
SJMP rel  
Absolute jump  
xxx019  
Long jump  
0x02  
Short jump (relative address)  
Jump indirect relative to the DPTR  
Jump if accumulator is zero  
0x80  
JMP @A+DPTR  
JZ rel  
0x73  
0x60  
JNZ rel  
Jump if accumulator is not zero  
Jump if carry flag is set to 1  
Jump if carry flag is 0  
0x70  
JC rel  
0x40  
JNC  
0x50  
JB bit,rel  
Jump if direct bit is set to 1  
0x20  
JNB bit,rel  
Jump if direct bit is 0  
0x30  
JBC bit,direct rel  
CJNE A,direct rel  
CJNE A,#data rel  
CJNE Rn,#data rel  
CJNE @Ri,#data rel  
DJNZ Rn,rel  
DJNZ direct,rel  
NOP  
Jump if direct bit is set to 1 and clear the bit to 0  
Compare direct byte to A and jump if not equal  
Compare immediate to A and jump if not equal  
Compare immediate to reg. and jump if not equal  
Compare immediate to indirect and jump if not equal  
Decrement register and jump if not zero  
Decrement direct byte and jump if not zero  
No operation  
0x10  
0xB5  
0xB4  
0xB8 - 0xBF  
0xB6 -0xB7  
0xD8 - 0xDF  
0xD5  
0x00  
Boolean Variable Operations  
CLR C  
Clear carry flag  
0xC3  
0xC2  
0xD3  
0xD2  
0xB3  
0xB2  
0x82  
0xB0  
0x72  
0xA0  
0xA2  
0x92  
1
2
1
2
1
2
2
2
2
2
2
2
1
3
1
3
1
3
2
2
2
2
2
3
CLR bit  
Clear direct bit  
SETB C  
Set carry flag to 1  
SETB bit  
CPL C  
Set direct bit to 1  
Complement carry flag  
Complement direct bit  
CPL bit  
ANL C,bit  
ANL C,/bit  
ORL C,bit  
ORL C,/bit  
MOV C,bit  
MOV bit,C  
Miscellaneous  
TRAP  
AND direct bit to carry flag  
AND complement of direct bit to carry  
OR direct bit to carry flag  
OR complement of direct bit to carry  
Move direct bit to carry flag  
Move carry flag to direct bit  
Set SW breakpoint in debug mode  
0xA5  
1
1
Table 37: Instruction Set Summary  
9
addr11[10:8] is mapped into bits 7:5 of the first instruction byte (i.e. the opcode). addr11[7:0] is  
mapped into the second instruction byte  
SWRS033H  
Page 59 of 246  
 
 
 复制成功!