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SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
DEVICE INFORMATION
PIN DIAGRAM
Pin out designations are not final. Subject to change.
RGT
TOP VIEW
TS
BAT
BAT
CE
1
2
3
4
16 15 14 13
12
bq24072T
11
10
9
5
6
7
8
ILIM
OUT
OUT
CHG
TS
BAT
BAT
CE
1
2
3
4
16 15 14 13
12
bq24075T
11
bq24079T
10
9
5
6
7
8
ISET
SYSOFF
TMR
IN
ISET
TD
TMR
IN
ILIM
OUT
OUT
CHG
EN2
EN1
PGOOD
EN2
EN1
PGOOD
VSS
TERMINAL FUNCTIONS
PIN
NUMBER
NAME
TS
bq24072T
1
bq24075T
bq24079T
1
I/O
I/O
DESCRIPTION
External NTC Thermistor Input. Connect the TS input to the center tap of a resistor divider
from V
IN
to GND with the NTC in parallel with the bottom resistor to monitor the NTC in the
battery pack. For applications that do not utilize the TS function, set the resistor divider to
be a 20% ratio. See the Battery Pack Temperature Monitoring section for details on
calculating the resistor values.
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive
terminal of the battery. Bypass BAT to VSS with a 4.7mF to 47mF ceramic capacitor.
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery
charger in standby mode. In standby mode, OUT is active and battery supplement mode is
available. Connect /CE to a low logic level to enable the battery charger. CE is internally
pulled down with ~285kΩ. Do not leave CE unconnected to ensure proper operation.
Input Current Limit Configuration Inputs. Use EN1 and En2 to control the maximum input
current and enable USB compliance. See
for the description of the operation states.
EN1 and EN2 are internally pulled down with ~285kΩ. Do not leave EN1 or EN2
unconnected to ensure proper operation.
Open-Drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input
source is detected. PGOOD is high-impedance when the input power is not within specified
limits. Connect PGOOD to the desired logic voltage rail using a 1kΩ to 100kΩ resistor, or
use with an LED for visual indication.
Ground. Connect to the thermal pad and to the ground rail of the circuit.
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is
charging. CHG is high-impedance when charging is complete or when the charger is
disabled. CHG flashes to indicate a timer fault. Connect CHG to the desired logic voltage
rail using a 1kΩ to 100kΩ resistor, or use with an LED for visual indication.
System Supply Output. OUT provides a regulated output when the input is below the OVP
threshold and above the regulation voltage. When the input is out of the operation range,
OUT is connected to VBAT except when SYSOFF is high. Connect OUT to the system load.
Bypass OUT to VSS with a 4.7mF to 47mF ceramic capacitor.
Adjustable Current Limit Programming Input. Connect a 1.07kΩ to 7.5kΩ resistor from ILIM
to VSS to program the maximum input current (EN2=1, EN1=0). The input current includes
the system load and the battery charge current. Leaving ILIM unconnected disables all
charging.
7
BAT
CE
2, 3
4
2, 3
4
I/O
I
EN2
EN1
PGOOD
5
6
7
5
6
7
I
I
O
VSS
CHG
8
9
8
9
–
O
OUT
10, 11
10, 11
O
ILIM
12
12
O
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