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BQ24032ARHLR 参数 Datasheet PDF下载

BQ24032ARHLR图片预览
型号: BQ24032ARHLR
PDF下载: 下载PDF文件 查看货源
内容描述: 单片充电和系统电源路径管理IC ( bqTINY ) [SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC (bqTINY)]
分类和应用: 电源电路电源管理电路PC
文件页数/大小: 38 页 / 846 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SLUS618F – AUGUST 2004 – REVISED NOVEMBER 2006
ELECTRICAL CHARACTERISTICS
over junction temperature range (0°C
T
J
125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
INPUT BIAS CURRENTS
I
CC(SPLY)
I
CC(SLP)
Active supply current, VCC
Sleep current (current into BAT
pin)
V
VCC
> V
VCC(min)
V
(AC)
< V
(BAT)
, V
(USB)
< V
(BAT)
,
2.6 V
V
I(BAT)
V
O(BAT-REG)
,
Excludes load on OUT pin
V
I(AC)
6 V, Total current into AC pin
with chip disabled, Excludes all loads,
CE=LOW, after t
(CE-HOLDOFF)
delay
Total current into USB pin with chip
disabled, Excludes all loads, CE=LOW,
after t
(CE-HOLDOFF)
delay
Total current into BAT pin with AC
and/or USB present and chip disabled;
Excludes all loads (OUT and LDO),
CE=LOW, after t
(CE-HOLDOFF)
delay,
0°C
T
J
85°C
(1)
Charge DONE, AC or USB supplying the
load
1
2
2
5
mA
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
CC(AS-STDBY)
AC standby current
200
I
CC(USB-STDBY)
USB standby current
200
µA
I
CC(BAT-STDBY)
BAT standby current
45
60
I
IB(BAT)
Charge done current, BAT
1
5
HIGH AC CUTOFF MODE
V
I(AC)
> 6.8 V, AC FET (Q1) turns off,
USB FET (Q3) turns on if USB power
present, otherwise BAT FET (Q2) turns
on.
V
CUT-OFF
LDO OUTPUT
V
O(LDO)
Input ac cutoff voltage, bq24035
6.1
6.4
6.8
V
Output regulation voltage
Regulation accuracy
(2)
Active only if AC or USB is present,
V
I(OUT)
V
O(LDO)
+ (I
O(LDO)
× R
DS(on)
)
–5%
3.3
5%
20
V
I
O(LDO)
R
DS(on)
C
(OUT) (3)
Output current
On resistance
Output capacitance
V
I(AC)
6 V+V
DO
V
I(AC)
4.4 V+V
DO
VBSEL = HIGH or VBSEL = LOW,
V
I(AC)
> 4.4 V+V
DO
V
DPPM-SET
< V
OUT
AC or USB present
V
(DPPM-REG)
= V
(DPPM-SET)
× SF
2.6
95
1.139
100
1.150
OUT to LDO
mA
µF
50
1
OUT PIN-VOLTAGE REGULATION
bq24030/31
V
O(OUT-REG)
Output
regulation
voltage
bq24032A
bq24038
6.0
4.4
4.4
6.3
4.5
4.5
V
OUT PIN – DPPM REGULATION
V
(DPPM-SET)
I
(DPPM-SET)
SF
DPPM set point
(4)
DPPM current source
DPPM scale factor
5
105
1.162
V
µA
(1)
(2)
(3)
(4)
This includes the quiescent current for the integrated LDO.
In standby mode (CE low) the accuracy is ±10%.
LDO output capacitor not required but one with a value of 0.1 µF is recommended.
V
(DPPM-SET)
is scaled up by the scale factor for controlling the output voltage V
(DPPM-REG)
.
4