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BQ24030RHLR 参数 Datasheet PDF下载

BQ24030RHLR图片预览
型号: BQ24030RHLR
PDF下载: 下载PDF文件 查看货源
内容描述: 单片充电和系统电源路径管理IC ( bqTINYI ) [SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC (bqTINYI)]
分类和应用: 电源电路电源管理电路PC
文件页数/大小: 20 页 / 307 K
品牌: TI [ TEXAS INSTRUMENTS ]
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bq24030, bq24032, bq24035
SLUS618 – AUGUST 2004
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0°C
T
J
125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
I
IL
I
IH
I
IL
I
IH
t
(CE-HLDOFF)
TIMERS
K
(TMR)
R
(TMR)
t
(PRECHG)
I
(FAULT)
Timer set factor
External resistor limits
Precharge timer
Timer fault recovery pull-up from
OUT to BAT
t
(CHG)
= K
(TMR)
×
R
(TMR)
0.313
30
0.09
×
t
(CHG)
0.01
×
t
(CHG)
1
0.360
0.414
100
0.11
×
t
(CHG)
s/Ω
kΩ
s
mA
Low-level input current, CE or
PSEL
High-level input current, CE or
PSEL
Low-level input current, ISET2
High-level input current, ISET2
Hold off time, CE
V
ISET2
= 0 V
V
ISET2
= V
CC
CE going low only
4
-20
40
6
TEST CONDITIONS
MIN
-1
1
µA
TYP
MAX UNIT
CHARGER SLEEP THRESHOLDS
V
(SLPENT)
Sleep mode entry threshold
V
(UVLO)
V
I(BAT)
V
O(BAT-REG)
,
No t
(BOOT-UP)
delay
V
(UVLO)
V
I(BAT)
V
O(BAT-REG)
,
No t
(BOOT-UP)
delay
R
(TMR)
= 50 kΩ,
V
(AC)
or V
(USB)
or decreasing below
threshold, 100-ns fall time, 10-mv over-
drive
Upon the first application of USB input
power or AC input with PSEL low
After ACPG or USBPG detection, low to
high (no (t
(BOOT-UP)
) delay) or after CE hold
off time
After ACPG or USBPG detection, low to
high (no (t
(BOOT-UP)
) delay)
Toggling PSEL High to Low or Low to High
V
VCC
V
I(BAT)
+190 mV
22.5
V
VCC
V
I(BAT)
+125 mV
V
V
(SLPEXIT)
Sleep mode exit threshold
t
(DEGL)
Deglitch time for sleep mode
(13)
ms
START-UP CONTROL and USB BOOT-UP
t
(BOOT-UP)
Boot-up time
120
150
180
ms
SWIITCHING POWER SOURCE TIMING
Switching power source from in-
puts (AC or USB) to battery
Switching from AC to USB, or,
USB to AC by input source re-
moval.
(14)
Switching from AC to USB, or
USB to AC by toggling PSEL
THERMAL SHUTDOWN REGULATION
(15)
T
(SHTDWN)
T
J(REG)
UVLO
V
(UVLO)
Undervoltage lockout
Hysteresis
Decreasing V
CC
2.45
2.50
27
2.65
V
mV
Temperature trip
Thermal hysteresis
Temperature regulation limit
T
J
(Q1 and Q3 only)
T
J
(Q1 and Q3 only)
T
J
(Q2)
115
155
30
135
°C
50
µs
100
50
(13) Doesn’tdeclare sleep mode until after the deglitch time and implement the needed powertransfer immediately according to the switching
specification.
(14) The power handoff isimplemented once the PG pin goes goeshigh (removed source’s PG) which is when the removed source drops to
thebattery voltage. if the battery voltage is critically low the system may loosepower unless the system takes control of the PSEL pin and
switches to theavailable power source prior to shutdown. the USB source often has less currentavailable so the system may have to
reduce its load when switching from AC toUSB.
(15) Reaching thermalregulation reduces the charging current. Battery supplement current is notrestricted by either thermal regulation or
shutdown. Input power FETs turn offduring thermal shutdown. The battery FET is only protected by a short circuitlimit which typically
doesn't cause a thermal shutdown (input FETs turning off)by itself.
6