bq2205LY
SLUS581 − FEBRUARY 2004
FUNCTIONAL DESCRIPTION
Two banks of CMOS static RAM can be battery-backed using the VOUT and conditioned chip-enable output
pins from the bq2205. As the voltage input VCC slews down during a power failure, the two-conditioned chip
enable outputs, CE
CON1
and CE
CON2
, are forced inactive independent of the chip enable input, CE. This activity
unconditionally write-protects the external SRAM as VCC falls to an out-of-tolerance threshold V
PFD
. As the
supply continues to fall past V
PFD
, an internal switching device forces VOUT to the backup energy source.
CE
CON1
and CE
CON2
are held high by the VOUT energy source.
During power-up, VOUT is switched back to the 3.3-V supply as VCC rises above the backup cell input voltage
sourcing VOUT. Outputs CE
CON1
and CE
CON2
are held inactive for time t
CER
after the power supply has reached
V
PFD
, independent of the CE input, to allow for processor stabilization.
During power-valid operation, the CE input is passed through to one of the two CE
CONx
outputs with a
propagation delay of less than t
CED
. The CE input is output on one of the two CE
CONx
output pins; depending
on the level of bank select input A. See truth table below.
Table 1. Truth Table
INPUT
CE
H
L
L
A
x
L
H
OUTPUT
CECON1
H
L
H
CECON2
H
H
L
Bank select input A is usually tied to a high-order address pin so that a large nonvolatile memory can be
designed using lower-density memory devices. Non-volatility and decoding are achieved by hardware hookup
as shown in the application diagram.
The RST output can be used as the power-on reset for a microprocessor. Access to the external RAM may begin
when RST returns inactive.
BATTERY BACKUP INPUT
Backup energy source, BC
P,
input is provided on the bq2205 for use with an external primary cell. The primary
cell input is designed to accept any 3-V primary battery (non-rechargeable), typically some type of lithium
chemistry.
Power-Down and Power-Up Cycle
The bq2205 continuously monitors VCC for out-of-tolerance. During a power failure, when VCC falls below
V
PFD
, the bq2205 write-protects the external SRAM. The power source is switched to BC
P
when V
CC
is less
than V
PFD
and BC
P
is greater than V
PFD
, or when V
CC
is less than BC
P
and BC
P
is less than V
PFD
. When VCC
is above V
PFD
, the power source is V
CC
. Write-protection continues for t
CER
time after VCC rises above V
PFD
.
An external CMOS static RAM is battery-backed using the VOUT and chip enable output pins from the bq2205.
As the voltage input V
CC
slews down during a power failure, the chip enable output, CE
CONx
, is forced inactive
independent of the chip enable input CE.
As the supply continues to fall past V
PFD
, an internal switching device forces VOUT to the external backup
energy source. CE
CONx
is held high by the VOUT energy source.
6
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