AM6548, AM6528, AM6526
ZHCSLA7B –DECEMBER 2019 –REVISED JUNE 2021
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表6-1. Pin Attributes (continued)
BALL
RESET
REL.
RXACTIVE
PULL UP/
BALL
RESET
I/O
VOLTAGE
BALL NUMBER
MUXMOD
E [4]
BUFFER
TYPE [11]
/
IO Daisy
BALL NAME [2]
SIGNAL NAME [3]
TYPE [5]
POWER [9]
HYS [10]
DOWN
DSIS [13]
[1]
TXDISABL Chain [15]
E [14]
STATE [6] MUXMOD VALUE [8]
E [7]
TYPE [12]
F15
F13
DDR_VREF_ZQ
DDR_VREF_ZQ
A
VDDS_DDR
VDDS_DDR
DDR
DDR
No
No
DDR_VTP
DDR_VTP
A
1.1 V/1.2
V/1.35 V
D21
ECAP0_IN_APWM_OUT
ECAP0_IN_APWM_OUT
SYNC0_OUT
CPTS0_RFT_CLK
GPIO1_86
0
IO
O
I
OFF
7
1.8 V/3.3 V VDDSHV0
Yes
LVCMOS
PU/PD
0
0/1
Yes
1
2
7
0
0
0
IO
IO
AA2
AA1
A22
EMU0
EMU0
PU
0
0
7
1.8 V/3.3 V VDDSHV0_WK Yes
UP
LVCMOS
LVCMOS
LVCMOS
PU/PD
PU/PD
PU/PD
1/1
1/1
0/1
Yes
Yes
Yes
EMU1
EMU1
0
IO
PU
1.8 V/3.3 V VDDSHV0_WK Yes
UP
EXT_REFCLK1
EXT_REFCLK1
SYNC1_OUT
0
I
OFF
1.8 V/3.3 V VDDSHV0
1.8 V/3.3 V VDDSHV2
Yes
Yes
0
0
1
O
IO
O
O
IO
I
GPIO1_87
7
P25
R28
GPMC0_ADVn_ALE
GPMC0_CLK
GPMC0_ADVn_ALE
VOUT1_DATA17
GPIO0_17
0
OFF
OFF
7
7
LVCMOS
LVCMOS
PU/PD
PU/PD
1/1
0/1
Yes
Yes
1
7
0
0
0
BOOTMODE16
GPMC0_CLK
Bootstrap
0
1
2
3
7
0
1
2
3
4
5
6
O
O
I
1.8 V/3.3 V VDDSHV2
Yes
Yes
VOUT1_DATA16
VIN0_PCLK
0
0
GPMC0_FCLK_MUX
GPIO0_16
O
IO
O
O
I
T24
GPMC0_DIR
GPMC0_DIR
OFF
7
1.8 V/3.3 V VDDSHV2
LVCMOS
PU/PD
0/1
Yes
VOUT1_HSYNC
VIN0_DATA8
0
1
PRG2_PWM1_B0
PRG2_IEP1_EDC_SYNC_OUT0
TIMER_IO6
IO
O
IO
IO
0
0
PRG2_IEP0_EDIO_DATA_IN_OUT2
9
GPIO0_25
7
IO
O
O
IO
I
0
P26
GPMC0_OEn_REn
GPMC0_OEn_REn
VOUT1_DATA18
GPIO0_18
0
OFF
7
1.8 V/3.3 V VDDSHV2
Yes
LVCMOS
PU/PD
1/1
Yes
1
7
0
0
BOOTMODE17
Bootstrap
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