AM6548, AM6528, AM6526
ZHCSLA7B –DECEMBER 2019 –REVISED JUNE 2021
www.ti.com.cn
表6-76. Pin Multiplexing (continued)
MUXMODE[7:0] SETTINGS
BALL
NUMBER
ADDRESS
REGISTER NAME
0
1
2
3
4
5
6
7
Bootstrap
0x4301C048 CTRLMMR_WKUP_PADCON P5
FIG18
MCU_OSPI1_D2
MCU_UART0_TXD MCU_SPI1_CS2
WKUP_GPIO0_30
0x4301C04C CTRLMMR_WKUP_PADCON P1
FIG19
MCU_OSPI1_D3
MCU_UART0_CTS MCU_SPI0_CS1
n
WKUP_GPIO0_31
WKUP_GPIO0_32
WKUP_GPIO0_33
WKUP_GPIO0_34
WKUP_GPIO0_35
WKUP_GPIO0_36
WKUP_GPIO0_37
WKUP_GPIO0_38
WKUP_GPIO0_39
WKUP_GPIO0_40
WKUP_GPIO0_41
WKUP_GPIO0_42
WKUP_GPIO0_43
WKUP_GPIO0_44
WKUP_GPIO0_45
WKUP_GPIO0_46
WKUP_GPIO0_47
0x4301C050 CTRLMMR_WKUP_PADCON N2
FIG20
MCU_OSPI1_CSn
0
0x4301C054 CTRLMMR_WKUP_PADCON N3
FIG21
MCU_OSPI1_CSn MCU_HYPERBUS MCU_TIMER_IO0 MCU_HYPERBUS MCU_UART0_RTS MCU_SPI0_CS2
0_WPn 0_CSn1
1
n
0x4301C058 CTRLMMR_WKUP_PADCON N4
FIG22
MCU_RGMII1_TX_ MCU_RMII1_CRS_
CTL DV
0x4301C05C CTRLMMR_WKUP_PADCON N5
FIG23
MCU_RGMII1_RX_ MCU_RMII1_RX_E
CTL
R
0x4301C060 CTRLMMR_WKUP_PADCON M2
FIG24
MCU_RGMII1_TD3
0x4301C064 CTRLMMR_WKUP_PADCON M3
FIG25
MCU_RGMII1_TD2
0x4301C068 CTRLMMR_WKUP_PADCON M4
FIG26
MCU_RGMII1_TD1 MCU_RMII1_TXD1
MCU_RGMII1_TD0 MCU_RMII1_TXD0
MCU_RGMII1_TX MCU_RMII1_TX_E
0x4301C06C CTRLMMR_WKUP_PADCON M5
FIG27
0x4301C070 CTRLMMR_WKUP_PADCON N1
FIG28
C
N
0x4301C074 CTRLMMR_WKUP_PADCON M1
FIG29
MCU_RGMII1_RX MCU_RMII1_REF_
C
CLK
0x4301C078 CTRLMMR_WKUP_PADCON L2
FIG30
MCU_RGMII1_RD
3
0x4301C07C CTRLMMR_WKUP_PADCON L5
FIG31
MCU_RGMII1_RD
2
0x4301C080 CTRLMMR_WKUP_PADCON M6
FIG32
MCU_RGMII1_RD MCU_RMII1_RXD1
1
0x4301C084 CTRLMMR_WKUP_PADCON L6
FIG33
MCU_RGMII1_RD MCU_RMII1_RXD0
0
0x4301C088 CTRLMMR_WKUP_PADCON L4
FIG34
MCU_MDIO0_MDI
O
0x4301C08C CTRLMMR_WKUP_PADCON L1
FIG35
MCU_MDIO0_MD
C
0x4301C090 CTRLMMR_WKUP_PADCON Y1
FIG36
MCU_SPI0_CLK
MCU_SPI0_D0
MCU_SPI0_D1
MCU_SPI0_CS0
WKUP_GPIO0_48 MCU_BOOTMODE
06
0x4301C094 CTRLMMR_WKUP_PADCON Y3
FIG37
WKUP_GPIO0_49 MCU_BOOTMODE
07
0x4301C098 CTRLMMR_WKUP_PADCON Y2
FIG38
WKUP_GPIO0_50 MCU_BOOTMODE
05
0x4301C09C CTRLMMR_WKUP_PADCON Y4
FIG39
WKUP_GPIO0_51
0x4301C0A0 CTRLMMR_WKUP_PADCON AB1
FIG40
WKUP_UART0_RX
D
WKUP_GPIO0_52
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