AM26LV32C, AM26LV32I
LOW VOLTAGE HIGH SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202E − MAY 1995 − REVISED JUNE 2005
FUNCTION TABLE
(each receiver)
DIFFERENTIAL
INPUT
VID
≥
0.2 V
−0.2 V < VID < 0.2 V
VID
≤
− 0.2 V
Open, shorted, or
terminated†
X
ENABLES
G
H
X
H
X
H
X
H
X
L
G
X
L
X
L
X
L
X
L
H
OUTPUT
H
H
?
?
L
L
H
H
Z
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
† See application information attached.
logic symbol
‡
G
G
4
12
≥
1
EN
logic diagram (positive logic)
G
G
1A
4
12
2
1
3 1Y
1A
1B
2
1
3
1B
1Y
2A
6
2A
7
2B
10
3A
9
3B
14
4A
15
4B
6
7
5 2Y
5
11
13
2Y
3Y
2B
3A
4Y
3B
10
9
11 3Y
‡ This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
4A
4B
14
15
13 4Y
2
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•
DALLAS, TEXAS 75265