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ADS823EG4 参数 Datasheet PDF下载

ADS823EG4图片预览
型号: ADS823EG4
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 60MHz的采样模拟数字转换器 [10-Bit, 60MHz Sampling ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 16 页 / 335 K
品牌: TI [ TEXAS INSTRUMENTS ]
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1.62kΩ
+5V
V
CM
+2.5V
+5V
0.1µF
V
IN
OPA690
10pF
+V
IN
0V
–V
IN
R
F
402Ω
CM
R
G
402Ω
0.1µF
IN
0.1µF
INT/EXT
GND
ADS823
ADS826
50Ω
R
S
50Ω
IN
REFB
+1.5V
REFT
+3.5V
RSEL
+V
S
1.62kΩ
FIGURE 2. AC-Coupled Input Configuration for a 2Vp-p Full-Scale Range and a Common-Mode Voltage, V
CM
, at +2.5V Derived
from the Internal Top (REFT) and Bottom Reference (REFB).
+5V
1.62kΩ
+5V
V
IN
OPA642
100pF
–5V
R
F
402Ω
1.62kΩ
CM
IN
R
G
402Ω
0.1µF
REFB
+1.5V
ADS823
ADS826
R
S
24.9Ω
0.1µF
IN
REFT
+3.5V
RSEL
+V
S
INT/EXT
GND
FIGURE 3. AC-Coupling the Dual-Supply Amplifier OPA642 to the ADS823 and ADS826 for a 2Vp-p Full-Scale Input Range.
For applications requiring the driving amplifier to provide a
signal amplification, with a gain
5, consider using decom-
pensated voltage-feedback op amps, like the OPA686, or
current-feedback op amps like the OPA6901.
the +2.5V common-mode voltage available at the CM pin.
One half of amplifier A1 buffers the REFB pin and drives the
voltage divider R
1
, R
2
. Due to the op amp’s noise gain of
+2V/V, assuming R
F
= R
IN
, the common-mode voltage (V
CM
)
has to be re-scaled to +1.25V. This results in the correct DC
level of +2.5V for the signal input (IN). Any DC voltage
differences between the IN and IN inputs of the ADS823 and
ADS826 effectively produce an offset, which can be cor-
rected for by adjusting the resistor values of the divider, R
1
and R
2
. The selection criteria for a suitable op amp should
include the supply voltage, input bias current, output voltage
swing, distortion, and noise specification. Note that in this
example the overall signal phase is inverted. To re-establish
the original signal polarity, it is always possible to inter-
change the IN and IN connections.
DC-Coupled with Level Shift
Several applications may require that the bandwidth of the
signal path includes DC, in which case the signal has to be
DC-coupled to the ADC. In order to accomplish this, the
interface circuit has to provide a DC level shift to the analog
input signal. The circuit of in Figure 4 employs a dual op amp,
A1, to drive the input of the ADS823 and ADS826, and level
shift the signal to be compatible with the selected input
range. With the RSEL pin tied to the supply and the INT/EXT
pin to ground, the ADS823 and ADS826 are configured for a
2Vp-p input range and uses the internal references. The
complementary input (IN) may be appropriately biased using
ADS823, ADS826
SBAS070B
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