ELECTRICAL CHARACTERISTICS
(Cont.)
At T
A
= full specified temperature range, V
S
= +5V, differential input range = 2V to 3V for each input, sampling rate = 50MHz, unless otherwise noted.
PARAMETER
DIGITAL OUTPUTS
Logic Family
Logic Coding
Low Output Voltage (I
OL
= 50µA)
Low Output Voltage, (I
OL
= 1.6mA)
High Output Voltage, (I
OH
= 50µA)
High Output Voltage, (I
OH
= 0.5mA)
Low Output Voltage, (I
OL
= 50µA)
High Output Voltage, (I
OH
= 50µA)
3-State Enable Time
3-State Disable Time
Output Capacitance
CONDITIONS
MIN
TYP
MAX
UNITS
CMOS
Straight Offset Binary
VDRV = 5V
VDRV = 5V
VDRV = 5V
VDRV = 5V
VDRV = 3V
VDRV = 3V
OE = L
(5)
OE = H
(5)
+0.1
+0.2
+4.9
+4.8
+0.1
+2.8
20
2
5
±1.0
16
±1.5
66
±1.0
23
70
±10
±20
±10
±20
3
2
1
+5.0
60
305
290
350
335
50
40
10
V
V
V
V
V
V
ns
ns
pF
%FS
ppm/°C
%FS
ppm/°C
%FS
ppm/°C
dB
mV
mV
mV
mV
V
V
kΩ
V
mA
mW
mW
mW
mW
°C/W
ACCURACY (Internal Reference, 2Vp-p, Unless Otherwise Noted)
Zero Error (Referred to –FS)
at 25°C
Zero Error Drift (Referred to –FS)
at 25°C
Gain Error
(6)
Gain Error Drift
(6)
Gain Error
(7)
at 25°C
Gain Error Drift
(7)
Power-Supply Rejection of Gain
∆V
S
=
±5%
REFT Tolerance
2V Full-Scale
Deviation From Ideal 3.0V
3V Full-Scale
Deviation From Ideal 3.25V
REFB Tolerance
2V Full-Scale
3V Full-Scale
External REFT Voltage Range
External REFB Voltage Range
Reference Input Resistance
POWER-SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Supply Current: +I
S
Power Dissipation: VDRV = 5V
VDRV = 3V
VDRV = 5V
VDRV = 3V
Thermal Resistance,
θ
JA
SSOP-28
Deviation From Ideal 2.0V
Deviation From Ideal 1.75V
±2.0
±2.5
±1.5
50
±65
±100
±65
±100
V
S
– 1.70
REFT – 0.4
REFB + 0.4
1.70
Operating
Operating
External Reference
External Reference
Internal Reference
Internal Reference
+4.75
+5.25
360
350
390
380
NOTES: (1) Spurious-Free Dynamic Range refers to the magnitude of the largest harmonic. (2) dBFS means dB relative to Full-Scale. (3) 2-tone intermodulation
distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the 2-tone fundamental envelope.
(4) Effective number of bits (ENOB) is defined by as (SINAD – 1.76)/6.02. (5) A 50kΩ pull-down resistor is inserted internally on OE pin. (6) Includes internal reference.
(7) Excludes internal reference.
4
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