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SBAS124C − DECEMBER 1999 − REVISED DECEMBER 2005
OUTPUT OFFSET ERROR
vs
COMMON-MODE VOLTAGE
OUTPUT OFFSET ERROR
vs
POWER SUPPLY VOLTAGE
2
8
7
6
5
4
3
2
1
50 Ksps, CCLK = 2.5 MHz,
= 2.048 V
V
1.5
Gain = 20
REF
Gain = 10
1
Gain = 1
Gain = 10
0.5
0
Gain = 1
Gain = 20
−0.5
−1
1 LSB =
4 LSB =
86 dB for Gain = 20,
60 dB for Gain = 1
−72 dB for Gain = 1,
−98 dB for Gain = 20
−1.5
0
−2
−1
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
2
2.5
3
3.5
4
4.5
5
5.5
6
Common-Mode Voltage − V
V
DD
− Supply Voltage − V
Figure 5
Figure 6
QUIESCENT CURRENT
vs
PEAK-TO-PEAK OUTPUT NOISE
vs
GAIN
SAMPLING RATE
1.4
1.2
6
5
4
3
2
1
0
V
and Buffer ON, Oscillator OFF
REF
Serial Data Clocked During the 48 Clock
Count Conversion Cycle, CCLK = SCLK
1
0.8
0.6
V
V
= 5 V
= 3 V
DD
DD
0.4
0.2
0
1
10
100
1
2
4
5
8
10
16
20
Sampling Rate − ksps
Gain
Figure 7
Figure 8
8
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