ADS7870
www.ti.com
SBAS124C − DECEMBER 1999 − REVISED DECEMBER 2005
ELECTRICAL CHARACTERISTICS
For the Total System (1), −40°C
≤
TA
≤
85°C, VDD = 5 V, BUFIN = 2.5 V (using external reference), 2.5-MHz CCLK and 2.5-MHz SCLK (unless
otherwise noted).
PARAMETER
Digital Outputs
Data coding
Low-level output voltage, VOL
Logic levels
High-level output voltage, VOH
Leakage current
Output capacitance
Voltage Reference
Bandgap voltage
reference
Output drive
Reference Buffer
Input voltage, BUFIN
Input impedance, BUFIN
Input offset
Output voltage accuracy vs temperature,
BUFOUT/REFIN (2) (3)
Output drive, BUFOUT/REFIN
Power Supply Requirements
Supply voltage
1-kHz Sample rate
Power supply current (2)
50-kHz Sample rate
Power down
1-kHz Sample rate
Power dissipation (2)
50-kHz Sample rate
Power down
Temperature Range
Operating free-air
Storage range
Thermal resistance,
Q
JA
−40
−65
65
85
150
°C
°C
°C/W
REF and BUF on, Internal os-
cillator on
REF and BUF on, External
CCLK
REF, BUF, Internal
oscillator off
REF and BUF on, Internal
oscillator on
REF and BUF on, External
CCLK
REF and BUF off
2.25
6
8.5
5
2.7
0.45
1.2
1.7
1
5.5
V
mA
mA
µA
mW
mW
µW
Pin 28 used as output,
VREF = 2.048 V and 2.5 V
At pin 27
−10
−0.25
0.9
1000||3
±1
±0.05
10
20
10
0.25
50
VDD − 0.2
V
GΩ||pF
mV
%FSR
ppm/°C
mA
VREF = 2.048 V, 2.5 V
VREF = 1.15 V
Pin 26 used as output,
Use internal OSC or external
CCLK as conversion clock
−0.25
±0.05
1.15
±0.6
0.25
%FSR
V
µA
Binary 2s complement
ISINK = 5 mA
ISINK = 16 mA
ISOURCE = 0.5 mA
ISOURCE = 5 mA
Hi-Z state, VO = 0 V to VDD
5
VDD − 0.4
4.6
1
0.4
0.8
V
V
µA
pF
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(1) The specifications for the total system are overall analog input to digital output specifications. The specifications for internal functions indicate
the performance of the individual functions in the ADS7870.
(2) REF and BUF contribute 190
µA
and 150
µA
(950
µW
and 750
µW)
respectively. At initial power up the default condition for both REF and BUF
functions is power off. They can be turned on under software control by writing a 1 to D3 and D2 of register 7, REF/OSCILLATOR CONTROL
register.
(3) For VDD < 3 V, VREF = 2.5 V is not usable.
4
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