ADS7056
ZHCSG66 –MARCH 2017
www.ti.com.cn
Typical Applications (continued)
9.2.3 14-Bit, 10-kSPS DAQ Circuit Optimized for DC Sensor Measurements
AVDD
Sensor
RSOURCE
AVDD
AINP
+
TI Device
œ
CFLT
AINM
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 50. Interfacing the Device Directly With Sensors
In applications such as environmental sensors, gas detectors, and smoke or fire detectors where the input is very
slow moving and the sensor can be connected directly to the device operating at a lower throughput rate, a DAQ
circuit can be designed without the input driver for the ADC. This type of a use case is of particular interest for
applications in which the primary goal is to achieve the absolute lowest power, size, and cost. Typical
applications that fall into this category are low-power sensor applications (such as temperature, pressure,
humidity, gas, and chemical).
9.2.3.1 Design Requirements
For this design example, use the parameters listed in Table 4 as the input parameters.
Table 4. Design Parameters
DESIGN PARAMETER
Throughput
GOAL VALUE
10 kSPS
74 dB
SNR at 100 Hz
THD at 100 Hz
SINAD at 100 Hz
ENOB
–85 dB
73 dB
12 bits
Power
20 µW
9.2.3.2 Detailed Design Procedure
The ADS7056 can be directly interfaced with sensors at lower throughput without the need of an amplifier buffer.
The analog input source drive must be capable of driving the switched capacitor load of a SAR ADC and settling
the analog input signal within the acquisition time of the SAR ADC. However, the output impedance of the sensor
must be taken into account when interfacing a SAR ADC directly with sensors. Drive the analog input of the SAR
ADC with a low impedance source. The input signal requires more acquisition time to settle to the desired
accuracy because of the higher output impedance of the sensor. Figure 50 shows the simplified circuit for a
sensor as a voltage source with output impedance (Rsource).
The acquisition time of a SAR ADC (such as the ADS7056 ) can be increased by reducing throughput in the
following ways:
1. Reducing the SCLK frequency to reduce the throughput, or
2. Keeping the SCLK fixed at the highest permissible value (that is, 60 MHz for the device) and increasing the
CS high time.
28
Copyright © 2017, Texas Instruments Incorporated
TI [ TEXAS INSTRUMENTS ]
