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ADS7056 参数 Datasheet PDF下载

ADS7056图片预览
型号: ADS7056
PDF下载: 下载PDF文件 查看货源
内容描述: [具有 SPI 的 14 位 2.5MSPS 超低功耗、超小型 SAR ADC]
分类和应用:
文件页数/大小: 38 页 / 2138 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADS7056  
ZHCSG66 MARCH 2017  
www.ti.com.cn  
8.4.3.2 Offset Calibration During Normal Operation  
During normal operation, the host must provide 64 SCLKs in the serial transfer frame to enter the OFFCAL state.  
The device provides the conversion result for the previous sample during the first 18 SCLKs and 0's on SDO for  
the rest of the SCLKs in the serial transfer frame. For acquisition of the next sample, a minimum time of tACQ  
must be provided. If the host controller enters the OFFCAL state, but pulls the CS high before providing 64  
SCLKs, then the offset calibration process is aborted and the device enters ACQ state. Figure 42 and Table 3  
provide the timing for offset calibration during normal operation.  
Sample  
A
Sample  
A+1  
tCYCLE  
tACQ  
CS  
SCLK  
SDO  
4
16  
17  
64  
1
2
3
D12  
D0  
0
0
0
D13  
Data Output for Sample A-1  
Figure 42. Timing for Offset Calibration During Normal Operation  
Table 3. Timing Specifications for Offset Calibration During Normal Operation(1)  
MIN  
64 × tCLK + tACQ  
95  
TYP  
MAX  
UNIT  
ns  
tcycle  
tACQ  
fSCLK  
Cycle time for offset calibration on power-up  
Acquisition time  
ns  
Frequency of SCLK  
60  
MHz  
(1) In addition to the timing specifications of Figure 42 and Table 3, the timing specifications described in Figure 2 and the Timing  
Requirements table are also applicable for offset calibration during normal operation.  
22  
Copyright © 2017, Texas Instruments Incorporated  
 
 
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