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ADS1241-EVM 参数 Datasheet PDF下载

ADS1241-EVM图片预览
型号: ADS1241-EVM
PDF下载: 下载PDF文件 查看货源
内容描述: 24位模拟数字转换器 [24-Bit ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 25 页 / 408 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号ADS1241-EVM的Datasheet PDF文件第17页浏览型号ADS1241-EVM的Datasheet PDF文件第18页浏览型号ADS1241-EVM的Datasheet PDF文件第19页浏览型号ADS1241-EVM的Datasheet PDF文件第20页浏览型号ADS1241-EVM的Datasheet PDF文件第21页浏览型号ADS1241-EVM的Datasheet PDF文件第23页浏览型号ADS1241-EVM的Datasheet PDF文件第24页浏览型号ADS1241-EVM的Datasheet PDF文件第25页  
fosc  
fosc  
DEFINITION OF TERMS  
An attempt has been made to be consistent with the termi-  
nology used in this data sheet. In that regard, the definition  
of each term is given as follows:  
fMOD  
=
=
128 2SPEED  
mfactor  
PGA SETTING  
SAMPLING FREQUENCY  
fOSC  
1, 2, 4, 8  
f SAMP  
f SAMP  
f SAMP  
=
=
=
Analog Input Voltagethe voltage at any one analog input  
relative to GND.  
mfactor  
fOSC 2  
16  
32  
mfactor  
Analog Input Differential Voltagegiven by the following  
equation: (IN+) (IN). Thus, a positive digital output is  
produced whenever the analog input differential voltage is  
positive, while a negative digital output is produced whenever  
the differential is negative.  
fOSC 4  
mfactor  
fOSC 8  
64, 128  
f SAMP  
=
mfactor  
For example, when the converter is configured with a 2.5V  
reference and placed in a gain setting of 1, the positive  
full-scale output is produced when the analog input differen-  
tial is 2.5V. The negative full-scale output is produced when  
the differential is 2.5V. In each case, the actual input  
voltages must remain within the GND to VDD range.  
fSAMPthe frequency, or switching speed, of the input sam-  
pling capacitor. The value is given by one of the following  
equations:  
f
DATAthe frequency of the digital output data produced by  
the ADS1242 and ADS1243, fDATA is also referred to as the  
Data Rate.  
Conversion Cyclethe term conversion cycle usually refers  
to a discrete A/D conversion operation, such as that per-  
formed by a successive approximation converter. As used  
here, a conversion cycle refers to the tDATA time period.  
Full-Scale Range (FSR)as with most A/D converters, the  
full-scale range of the ADS1242 and ADS1243 is defined as  
the input, that produces the positive full-scale digital output  
minus the input, that produces the negative full-scale digital  
output.  
Data RateThe rate at which conversions are completed.  
See definition for fDATA  
.
For example, when the converter is configured with a 2.5V  
reference and is placed in a gain setting of 2, the full-scale  
range is: [1.25V (positive full-scale) minus 1.25V (negative  
full-scale)] = 2.5V.  
fosc  
fDATA  
=
128 2SPEED 1280 2DR  
SPEED = 0,1  
DR = 0,1, 2  
Least Significant Bit (LSB) Weightthis is the theoretical  
amount of voltage that the differential voltage at the analog  
input has to change in order to observe a change in the  
output data of one least significant bit. It is computed as  
follows:  
fOSCthe frequency of the crystal oscillator or CMOS com-  
patible input signal at the XIN input of the ADS1242 and  
ADS1243.  
f
MODthe frequency or speed at which the modulator of the  
ADS1242 and ADS1243 is running. This depends on the  
SPEED bit as given by the following equation:  
Full ScaleRange  
LSB Weight =  
2N 1  
SPEED = 0  
SPEED = 1  
where N is the number of bits in the digital output.  
mfactor  
128  
256  
tDATAthe inverse of fDATA, or the period between each data  
output.  
+5V SUPPLY ANALOG INPUT(1)  
GENERAL EQUATIONS  
DIFFERENTIAL  
FULL-SCALE RANGE INPUT VOLTAGES(2)  
PGA OFFSET  
RANGE  
FULL-SCALE  
RANGE  
DIFFERENTIAL  
INPUT VOLTAGES(2)  
PGA SHIFT  
RANGE  
GAIN SETTING  
1
2
5V  
±2.5V  
±1.25V  
±0.625V  
2.5V  
±1.25V  
4
1.25V  
±0.625V  
±312.5mV  
±156.25mV  
±78.125mV  
±39.0625mV  
±19.531mV  
±9.766mV  
RANGE = 0  
8
0.625V  
±312.5mV  
±156.25mV  
±78.125mV  
±39.0625mV  
±19.531mV  
16  
32  
64  
128  
312.5mV  
156.25mV  
78.125mV  
39.0625mV  
VREF  
PGA  
±V  
±V  
REF  
REF  
2 PGA  
4 PGA  
RANGE = 1  
NOTES: (1) With a +2.5V reference. (2) Refer to electrical specification for analog input voltage range.  
TABLE VI. Full-Scale Range versus PGA Setting.  
ADS1242, 1243  
22  
SBAS235B  
www.ti.com  
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