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ADC0848CCN 参数 Datasheet PDF下载

ADC0848CCN图片预览
型号: ADC0848CCN
PDF下载: 下载PDF文件 查看货源
内容描述: [8-Bit Microprocessor Compatible A/D Converter with Multiplexer Option 24-PDIP -40 to 85]
分类和应用: PC光电二极管转换器
文件页数/大小: 24 页 / 2164 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADC0844, ADC0848  
SNAS523D JUNE 1999REVISED MARCH 2013  
www.ti.com  
Input Current  
Due to the sampling nature of the analog inputs, short duration spikes of current enter the “+” input and exit the  
” input at the clock edges during the actual conversion. These currents decay rapidly and do not cause errors  
as the internal comparator is strobed at the end of a clock period. Bypass capacitors at the inputs will average  
these currents and cause an effective DC current to flow through the output resistance of the analog signal  
source. Bypass capacitors should not be used if the source resistance is greater than 1 kΩ.  
Input Source Resistance  
The limitation of the input source resistance due to the DC leakage currents of the input multiplexer is important.  
A worst-case leakage current of ± 1 μA over temperature will create a 1 mV input error with a 1 kΩ source  
resistance. An op amp RC active low pass filter can provide both impedance buffering and noise filtering should  
a high impedance signal source be required.  
OPTIONAL ADJUSTMENTS  
Zero Error  
The zero of the A/D does not require adjustment. If the minimum analog input voltage value, VIN(MIN), is not  
ground, a zero offset can be done. The converter can be made to output 0000 0000 digital code for this minimum  
input voltage by biasing any VIN () input at this VIN(MIN) value. This is useful for either differential or pseudo-  
differential modes of input channel configuration.  
The zero error of the A/D converter relates to the location of the first riser of the transfer function and can be  
measured by grounding the Vinput and applying a small magnitude positive voltage to the V+ input. Zero error  
is the difference between actual DC input voltage which is necessary to just cause an output digital code  
transition from 0000 0000 to 0000 0001 and the ideal ½ LSB value (½ LSB=9.8 mV for VREF=5.000 VDC).  
Full-Scale  
The full-scale adjustment can be made by applying a differential input voltage which is 1 ½ LSB down from the  
desired analog full-scale voltage range and then adjusting the magnitude of the VREF input for a digital output  
code changing from 1111 1110 to 1111 1111.  
Adjusting for an Arbitrary Analog Input Voltage Range  
If the analog zero voltage of the A/D is shifted away from ground (for example, to accommodate an analog input  
signal which does not go to ground), this new zero reference should be properly adjusted first. A VIN (+) voltage  
which equals this desired zero reference plus ½ LSB (where the LSB is calculated for the desired analog span, 1  
LSB = analog span/256) is applied to selected “+” input and the zero reference voltage at the corresponding “”  
input should then be adjusted to just obtain the 00HEX to 01HEX code transition.  
Figure 13. Referencing Examples - Ratiometric  
12  
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Product Folder Links: ADC0844 ADC0848