SNAS531B – AUGUST 1999 – REVISED MARCH 2013
Converter and Multiplexer Electrical Characteristics
The following specifications apply for V
CC
= V+ = V
REF
= 5V, V
REF
≤
V
CC
+0.1V, T
A
= T
j
= 25°C, and f
CLK
= 250 kHz unless
otherwise specified.
Boldface limits apply from T
MIN
to T
MAX
.
CIWM Devices
Parameter
Conditions
Typ
CONVERTER AND MULTIPLEXER CHARACTERISTICS
ADC0838BCV
ADC0834BCN
Total
Unadjusted
Error
ADC0838CCV
ADC0831/2/4/8CCN
ADC0831/2/4/8CCWM
ADC0832/8CIWM
Minimum Reference Input
Resistance
(5)
Maximum Reference Input
Resistance
(5)
Maximum Common-Mode Input
Range
(6)
Minimum Common-Mode Input
Range
(6)
DC Common-Mode Error
Change in zero error from V
CC
=5V
to internal zener operation
(7)
V
Z
, internal diode
breakdown (at V+)
(7)
Power Supply Sensitivity
15 mA into V+, V
CC
=
N.C.,
V
REF
= 5V
±1/16
3.5
3.5
±1
1.3
5.9
V
CC
+0.05
GND
−0.05
±¼
1
6.3
8.5
V
CC
= 5V ± 5%
On Channel = 5V
I
OFF
, Off Channel Leakage
Current
(8)
Off Channel = 0V
On Channel = 0V
Off Channel = 5V
On Channel = 0V
I
ON
, On Channel Leakage Current
(8)
Off Channel = 5V
On Channel = 5V
Off Channel = 0V
(1)
(2)
(3)
(4)
(5)
(6)
±1/16
±¼
−0.2
−1
+0.2
+1
−0.2
−1
+0.2
+1
+0.2
+1
μA
−0.2
−1
μA
+0.2
+1
μA
±¼
±1/16
±1/16
3.5
3.5
1.3
5.4
V
CC
+0.05
GND
−0.05
±¼
1
6.3
8.5
±¼
−0.2
1.3
5.9
V
CC
+0.05
GND
−0.05
±¼
1
6.3
8.5
±¼
−1
V
LSB
μA
kΩ
kΩ
V
V
LSB
LSB
V
REF
= 5.00 V
(4)
±½
±½
±1
±1
±1
±½
±½
±1
±1
±1
LSB (Max)
(1)
BCV, CCV, CCWM, BCN
and CCN Devices
Typ
(1)
Tested
Limit
(2)
Design
Limit
(3)
Tested
Limit
(2)
Design
Limit
(3)
Units
MIN 15 mA into V+
MAX
(7)
(8)
Typicals are at 25°C and represent most likely parametric norm.
Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level).
Ensured but not 100% production tested. These limits are not used to calculate outgoing quality levels.
Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors.
Cannot be tested for ADC0832-N.
For V
IN
(−)
≥
V
IN
(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input (see
which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater than the V
CC
supply. Be careful, during testing at low V
CC
levels (4.5V), as high level analog inputs (5V) can cause this input diode to
conduct—especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias of
either diode. This means that as long as the analog V
IN
or V
REF
does not exceed the supply voltage by more than 50 mV, the output
code will be correct. To achieve an absolute 0 V
DC
to 5 V
DC
input voltage range will therefore require a minimum supply voltage of 4.950
V
DC
over temperature variations, initial tolerance and loading.
Internal zener diodes (6.3 to 8.5V) are connected from V+ to GND and V
CC
to GND. The zener at V+ can operate as a shunt regulator
and is connected to V
CC
via a conventional diode. Since the zener voltage equals the A/D's breakdown voltage, the diode insures that
V
CC
will be below breakdown when the device is powered from V+. Functionality is therefore ensured for V+ operation even though the
resultant voltage at V
CC
may exceed the specified Absolute Max of 6.5V. It is recommended that a resistor be used to limit the max
current into V+. (See
in Functional Description)
Leakage current is measured with the clock not switching.
4
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