ADC0831-N, ADC0832-N, ADC0834-N, ADC0838-N
SNAS531B –AUGUST 1999–REVISED MARCH 2013
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Cop Coding Example
Mnemonic
LEI
SC
Instruction
ENABLES SIO's INPUT AND OUTPUT
C = 1
OGI
G0 = 0 (CS = 0)
CLR A
AISC 1
XAS
CLEARS ACCUMULATOR
LOADS ACCUMULATOR WITH 1
EXCHANGES SIO WITH ACCUMULATOR
AND STARTS SK CLOCK
LOADS MUX ADDRESS FROM RAM
INTO ACCUMULATOR
LDD
NOP
XAS
-
LOADS MUX ADDRESS FROM
ACCUMULATOR
↑
8 INSTRUCTIONS
↓
XAS
READS HIGH ORDER NIBBLE (4 BITS)
INTO ACCUMULATOR
XIS
CLER A
RC
PUTS HIGH ORDER NIBBLE INTO RAM
CLEARS ACCUMULATOR
C = 0
XAS
READS LOW ORDER NIBBLE INTO
ACCUMULATOR AND STOPS SK
PUTS LOW ORDER NIBBLE INTO RAM
G0 = 1 (CS = 1)
XIS
OGI
LEI
DISABLES SIO's INPUT AND OUTPUT
8048 Coding Example
Mnemonic
Instruction
P1, #0F7H ;SELECT A/D (CS = 0)
START:
ANL
MOV
B, #5
A, #ADDR
A
;BIT COUNTER←5
;A←MUX ADDRESS
;CY←ADDRESS BIT
;TEST BIT
MOV
LOOP 1: RRC
JC
ONE
;BIT=0
P1, #0FEH ;DI←0
ZERO:
ANL
JMP
CONT
;CONTINUE
;BIT=1
;DI←1
ONE:
ORL
P1, #1
CONT:
CALL PULSE
DJNZ B, LOOP 1 ;CONTINUE UNTIL
DONE
;PULSE SK 0→1→0
CALL PULSE
;EXTRA CLOCK FOR
SYNC
MOV
B, #8
;BIT COUNTER←8
;PULSE SK 0→1→0
;CY←DO
LOOP 2: CALL PULSE
IN
A, P1
A
A
A, C
A
C, A
RRC
RRC
MOV
RLC
MOV
;A←RESULT
;A(0)←BIT AND SHIFT
;C←RESULT
DJNZ B, LOOP 2 ;CONTINUE UNTIL
DONE
RETR
;PULSE SUBROUTINE
;SK←1
;DELAY
PULSE:
ORL
NOP
ANL
RET
P1, #04
P1, #0FBH ;SK←0
20
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