SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MAY 1997
APPLICATION INFORMATION
16-Line Data (active low)
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
8
8
0
9 10 11 12 13 14 15
Enable
(active low)
7 EI
1
2
3
4
5
6
7 EI
GS
’HC148
A1
’HC148
A1
EO A0
A2 GS
EO
A0
A2
’HC08
Priority Flag
(active low)
0
1
2
3
Encoded Data (active low)
16-Line Data (active low)
0
0
1
1
2
2
3
4
5
6
6
7
8
8
0
9 10 11 12 13 14 15
Enable
(active low)
3
4
5
7 EI
1
2
3
4
5
6
7 EI
GS
’HC148
A1
’HC148
A1
EO A0
A2 GS
EO
A0
A2
’HC00
Priority Flag
(active high)
0
1
2
3
Encoded Data (active high)
Figure 2. Priority Encoder for 16 Bits
Since the ’HC148 is a combinational logic circuit, wrong addresses can appear during input transients. Moreover, a
change from high to low at EI can cause a transient low on GS when all inputs are high. This must be considered when
strobing the outputs.
7
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