Spread Spectrum Clock Generator (SSCG)
The THCV231 serial data output and the THCV236 parallel data and clock outputs are modulated by
programmable SSCG. The THCV231 and THCV236 SSCG are enabled by only SSEN register. The modulation
rate and modulation frequency variation of output spread is controlled through the SSCG control registers on
each device. Do not enable spread spectrum for both the THCV231 and THCV236 at the same time.
Table 6. SSCG enable signal
Mode Entry Signal
Description
0:SSCG Disable
1:SSCG Enable
SSEN(register)
When customer use the mode and frequency range shown in Table 7, register setting is required according to
Table 8.
Table 7. Main-Link mode and frequency range requiring register setting
Freq.Range[MHz]
(SSCG Enable)
Register
Mode Setting
Setting
(*2)
MAINMODE
HFSEL
COL1
COL0
0
1
0
(*1)
min
26.6
26.6
33.3
50
max
40
50
66.6
100
1
1
1
1
0
0
0
1
0
0
1
Case1
Case1
Case2
Case3
(*1)
*1 Don’t care
*2 See Table 8
Table 8. SSCG register setting
Register Address(HEX)
Register Value(HEX)
Step
Case3
Description
Sub-Link
Master side
Sub-Link
Slave side
Case1
Case2
THCV231
THCV236
1
2
3
4
0x70
0x76
0x78
0x7C
0xF0
0xF6
0xF8
0xFC
0x01
Set 1 to PLL_SET_EN
Set PLL_SET0
Set PLL_SET1
0x02
0x02
0x01
0x3C
0x35
0x30
0x34
0x20
0x24
Set PLL_SET2
Modulation frequency fmod can be determined by HFSEL and LFSEL settings, input clock frequency and
FMOD register setting (default value 0xD). Refer to following formula.
fCLKSSCG
fmod
128 FMOD
fCLKSSCG is the frequency listed in Table 9 and Table 10.
THCV231_THCV236_Rev.2.30_E
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