THC63LVD824 _Rev2.0
Switching Characteristics
VCC = 3.0V ~ 3.6V, Ta = -10°C ~ +70°C
Symbol
Parameter
Min.
11.76
Typ.
tRCIP
Max.
Units
ns
Dual-in / Dual-out
Single-in / Dual-out
40.0
80.0
tRCP
CLKOUT Period
2tRCIP
14.8
ns
tRCP
----------
2
tRCH
tRCL
CLKOUT High Time
CKLOUT Low Time
ns
ns
tRCP
----------
2
tRS
tRH
0.3tRCP
0.3tRCP
TTL Data Setup to CLKOUT
ns
ns
ns
ns
ns
TTL Data Hold from CKLOUT
TTL Low to High Transition Time
TTL High to Low Transition Time
Input Data Position0 (tRCIP = 7.4ns)
tTLH
tTHL
tRIP1
3.0
3.0
0.0
5.0
5.0
-0.25
+0.25
tRCIP
tRCIP
------------
7
tRCIP
tRIP0
tRIP6
tRIP5
tRIP4
tRIP3
tRIP2
Input Data Position1 (tRCIP = 7.4ns)
Input Data Position2 (tRCIP = 7.4ns)
Input Data Position3 (tRCIP = 7.4ns)
Input Data Position4 (tRCIP = 7.4ns)
Input Data Position5 (tRCIP = 7.4ns)
Input Data Position6 (tRCIP = 7.4ns)
ns
ns
ns
ns
ns
ns
------------ – 0.25
7
------------ + 0.25
7
tRCIP
tRCIP
2------------
7
tRCIP
2------------ – 0.25
7
2------------ + 0.25
7
tRCIP
tRCIP
3------------
7
tRCIP
3------------ – 0.25
7
3------------ + 0.25
7
tRCIP
tRCIP
4------------
7
tRCIP
4------------ – 0.25
7
4------------ + 0.25
7
tRCIP
tRCIP
5------------
7
tRCIP
5------------ – 0.25
7
5------------ + 0.25
7
tRCIP
tRCIP
6------------
7
tRCIP
6------------ – 0.25
7
6------------ + 0.25
7
tRPLL
tRCIP
Phase Lock Loop Set
CLKIN Period
10.0
40.0
ms
ns
7.4
Skew Time between RCLK1 and
RCLK2
tCK12
ns
0.3tRCIP
AC Timing Diagrams
TTL Outputs
TTL Output
8pF
80%
80%
20%
20%
TTL Output Load
tTHL
tTLH
Copyright 2000-2003 THine Electronics, Inc. All rights reserved
7
THine Electronics, Inc.
THINE [ THINE ELECTRONICS, INC. ]
