THC63LVDM83D _Rev.3.1_E
THC63LVDM83D
REDUCED SWING LVDS 24Bit COLOR HOST-LCD PANEL INTERFACE
General Description
The THC63LVDM83D transmitter is designed to sup-
port pixel data transmission between Host and Flat
Panel Display from NTSC up to 1080p(60Hz).
The THC63LVDM83D converts 28bits of CMOS/TTL
data into LVDS(Low Voltage Differential Signaling)
data stream. The transmitter can be programmed for ris-
ing edge or falling edge clocks through a dedicated pin.
At a transmit clock frequency of 160MHz, 24bits of
RGB data and 4bits of timing and control data
(HSYNC, VSYNC, CNTL1, CNTL2) are transmitted at
an effective rate of 1120Mbps per LVDS channel.
Features
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Wide dot clock range: 8-160MHz suited for NTSC,
VGA, SVGA, XGA,SXGA and SXGA+
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PLL requires no external components
Supports spread spectrum clock generator
On chip jitter filtering
Clock edge selectable
Supports reduced swing LVDS for low EMI
Power down mode
Low power single 3.3V CMOS design
Low profile 56 Lead TSSOP Package
1.2 up to 3.3V tolerant data inputs to connect
directly to low power,low voltage application and
graphic processor.
Pin compatible with THC63LVDM83C/83R(24bits)
Block Diagram
THC63LVDM83D
CMOS/TTL
INPUTS
TA0-6
TB0-6
TC0-6
TD0-6
7
7
7
7
TTL PARALLEL TO SERIAL
DATA
(LVDS)
TA +/-
TB +/-
TC +/-
TD +/-
(56-1120Mbit/On Each
LVDS Channel)
TRANSMITTER
CLKIN
(8 to 160MHz)
R/F
/PDWN
RS
PLL
TCLK +/-
CLOCK
(LVDS)
8-160MHz
Copyright©2011 THine Electronics, Inc.
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THine Electronics, Inc.
THINE [ THINE ELECTRONICS, INC. ]
