THC63LVD823B_Rev.3.1_E
THC63LVD823B
160MHz 51Bits LVDS Transmitter
General Description
The THC63LVD823B transmitter is designed to sup-
port Single Link transmission between Host and Flat
Panel Display and Dual Link transmission between
Host and Flat Panel Display up to 1080p/QXGA resolu-
tions.
The THC63LVD823B converts 51bits of CMOS/TTL
data into LVDS (Low Voltage Differential Signaling)
data stream. The transmitter can be programmed for ris-
ing edge or falling edge clocks through a dedicated pin.
In Dual Link, the transmit clock frequency of 160MHz,
51bits of RGB data are transmitted at an effective rate
of 1.12Gbps per LVDS channel.
Features
•
Wide dot clock range suited for TV Signal (480p-
1080p), PC Signal (VGA-QXGA)
TTL/CMOS Input: 10-160MHz
LVDS Output: 20-160MHz
•
PLL requires No external components
•
Flexible Input/Output mode
1. Single/Dual TTL IN, Single/Dual LVDS OUT
2. Double edge input for Single TTL IN/Dual LVDS OUT
•
•
•
•
•
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Clock edge selectable
2 LVDS data mapping for simplifying PCB layout.
Pseudo Random pattern generation circuit
Supports Reduced swing LVDS for Low EMI
Power down mode
Low power single 3.3V CMOS design
1.2 up to 3.3V tolerant data inputs to connect
directly to low power,low voltage application and
graphic processor.
THC63LVD823A
100pin TQFP
•
Backward compatible with THC63LVD823/
•
Block Diagram
DATA Port1
Data Formatter
R1[7:0]
G1[7:0]
B1[7:0]
PARALLEL TO SERIAL
24
28
TA1 +/-
TB1 +/-
TC1 +/-
TD1 +/-
TA2 +/-
TB2 +/-
TC2 +/-
TD2 +/-
DATA Port2
R2[7:0]
G2[7:0]
B2[7:0]
HSYNC
VSYNC
DE
24
1) DEMUX
2) MUX
LVDS OUTPUT
Port1
3
PARALLEL TO SERIAL
R/F
RS
MAP
MODE[1:0]
O/E
DDRN
/PDWN
PRBS
28
LVDS OUTPUT
Port2
TCLK1 +/-
TRANSMITTER CLOCK IN
(10 to 160MHz)
PLL
TCLK2 +/- (N/C)
(20 to 160MHz)
Copyright©2011 THine Electronics, Inc.
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THine Electronics, Inc.
THINE [ THINE ELECTRONICS, INC. ]
