THC63LVD1027_Rev.2.0_E
THC63LVD1027
85MHz 10Bits Dual LVDS Repeater
General Description
The THC63LVD1027 LVDS(Low Voltage Differential
Signaling) repeater is designed to support pixel data
transmission between Host and Flat Panel Display up to
WUXGA resolution.
THC63LVD1027 receives the dual channel LVDS data
streams and transmits the LVDS data through various
line rate conversion modes, Dual Link Input / Dual Link
Output, Single Link Input / Dual Link Output, and Dual
Link Input / Single Link Output.
At a transmit clock frequency of 85MHz, 30bits of RGB
data and 5bits of timing and control data (HSYNC,
VSYNC, DE) are transmitted at an effective rate of
595Mbps per LVDS channel.
Features
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Up to 85MHz 10bit dual channel LVDS Receiver
Up to 85MHz 10bit dual channel LVDS Transmitter
Wide LVDS input skew margin: ± 480ps at 75MHz
Accurate LVDS output timing: ± 250ps at 75MHz
Reduced swing LVDS output mode supported to
suppress the system EMI
Various line rate conversion modes supported
Dual link input / Dual link output [clkout=1x clkin]
Single link input / Dual link output [clkout=1/2x clkin]
Dual link input / Single link output [clkout=2x clkin]
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Distribution
(signal duplication)
mode supported
Power down mode supported
3.3V single voltage power supply
No external components required for PLLs
64pin TSSOP with Exposed PAD
(0.5mm lead pitch)
Block Diagram
Dual In / Dual Out Mode
THine
®
THC63LVD1027
85MHz
85MHz
THC63LVD1027
85MHz
85MHz
10bit Pixel
LVDS-Rx
De-Serialize
LVDS-Tx
Serialize
10bit Pixel
Distribution Mode
85MHz
THC63LVD1027
85MHz
LVDS
1st Link
85MHz Max
Clock
LVDS
1st Link
PLL
Inter-Link
Multiplex
&
De-Multi-
plex
PLL
85MHz Max
Clock
85MHz
Single In / Dual Out Mode
Clock
Clock
PLL
85MHz
THC63LVD1027
42.5MHz
LVDS
2nd Link
85MHz Max
10bit Pixel
LVDS
2nd Link
85MHz Max
LVDS-Rx
De-Serialize
LDO
Regulator
LVDS-Tx
Serialize
10bit Pixel
42.5MHz
Dual In / Single Out Mode
42.5MHz
42.5MHz
THC63LVD1027
85MHz
3.3v Power Supply
Decoupling Capacitor
Copyright©2010 THine Electronics, Inc.
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THine Electronics,Inc.