AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
TV RGB Outputs
The device accepts RGB video signals from two
sources. The
Aux_R, Aux_G, Aux_B
input pins are
typically connected to the auxiliary SCART connector.
The
Enc_R, Enc_G, Enc_B
input pins are connected to
the RGB outputs of an external video encoder device.
These outputs are used as a video source for the TV
SCART pins
TV_R, TV_G,
and
TV_B.
The RGB video
source is selected by setting the lower three (3) bits of
serial port Register 1. When these bits are set to
xxxxx000, the RGB source will be the encoder. When
these bits are set to xxxxx001, the source will be the
auxiliary port. The TV RGB outputs can be muted
independently from the TV composite outputs. Setting
Bit 6 of Register 1 low (0) will allow normal operation.
Setting Bit 6 high (1) will set the TV RGB outputs to the
blank level.
RGB Gain:
The gain of the RGB outputs can be
adjusted to one of four different levels. Bits 4 and 5 in
Register 2 set the gain of the RGB output amplifiers
according to the following table:
Bit 5
0
0
1
1
Bit 4
0
1
0
1
RGB Amplifier Gain
Gain = 2 V/V = A
0
Gain = A
0
- 10%
Gain = A
0
- 20%
Gain = A
0
- 30%
Bit 7
0
0
1
1
Bit 6
0
1
0
1
Blank
source
BLANK = ABLANK
BLANK = EBLANK
BLANK = 0V
BLANK = 4V @ IC output pin
The user must insure that the source of the
Blank
output is the same as the source for the RGB outputs,
i.e.
ABLANK
is selected when the auxiliary RGB is
active and
EBLANK
is selected when the encoder RGB
is active.
TV Composite Output
The device provides inputs for two composite video
sources that can be switched to the TV SCART
composite video pin,
TV_YCout.
The
Aux_YC
input pin
is typically connected to the “Video In” pin (pin 20) on
the auxiliary SCART connector. The
Enc_YC
input pin
is typically connected to the “YC” or “CVBS” output
from the external video encoder device. Selection of
the video source for the TV composite output is
accomplished when the RGB video source is selected
(see the register tables). When Register 1 is set to
xxxxx000, the Encoder input is selected and when set
to xxxxx001, the Auxiliary input is selected.
TV SVHS Output Mode
The device supports SVHS video format. The SVHS
mode is selected for the TV SCART using the lower
three (3) bits of Register 1(except for SVHS Enc 4
mode). When the SVHS mode is selected, the
TV_YCout
pin will provide the luminance signal output
from the selected source. The chroma output will be
provided on the
TV_R
pin. The video source for SVHS
mode can be either the auxiliary port or the encoder port.
When the auxiliary port is selected as the video source,
the video on
Aux_R
will be provided at the
TV_R
output
pin and the
Aux_YC
video will be provided at the
TV_YCout
pin.
The device will support SVHS mode for four encoder
interface formats. The first encoder interface format
accepts chroma signals on the
Enc_C
pin and
luminance signals on the
Enc_Y
pin. This is designated
"SVHS, Enc 1" mode. The second format will receive
chroma information on the
Enc_B
pin and luminance
information on
Enc_G.
This format is designated
"SVHS, Enc 2". The third format will receive chroma
information from the
Enc_R
pin and luminance
information from the
Enc_G
pin. This mode is
designated “SVHS, Enc 3” on the serial port register
table. For these three modes, audio will come from the
Lin/Rin
inputs. The fourth format is designated "SVHS
Enc 4" (not available in the 48QFN package option). It is
selected by setting register one to xx110xxx. Chroma
information is received on the Enc2_C input pin.
Rev 2.1
DC Restore:
The device will generate a DC restore level
on each video output based on timing referenced to a
horizontal sync pulse. When the sync pulse is detected,
the DC restore circuit will act to position the blank level
to 1.2V at the respective RGB output pins and the
respective composite output pins (0.6V at the respective
RGB and composite video output load). The device can
be programmed to look for the horizontal sync pulse on
all of the RGB input pins or on the associated composite
video input pin (Aux_YC for the auxiliary port or
Enc_YC
for the external encoder). Bit 7 of Register 1 determines
the horizontal sync source. At power-up, this bit defaults
to a low (0) state, which programs the device to look for
sync detect on the RGB input signals. In this mode, the
device can detect a horizontal sync on any of the three
RGB input signals. When Bit 7 is set to a high (1) state,
the device will look for a sync detect from the signal on
either the
Aux_YC
or
Enc_YC
pin depending on which
source is selected.
Blanking:
The signal on the
Blank
output pin is
determined by the state of two MSBs in Register 2
according to the following table:
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©
2008 TERIDIAN Semiconductor Corporation
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
