78M6618 Data Sheet
DS_6618_005
2.4 Performance Specifications
2.4.1 Input Logic Levels
Table 5: Input Logic Levels
Parameter
Condition
Min
Typ
Max
Unit
V
Digital high-level input voltagea, VIH
Digital low-level input voltagea, VIL
2
0.8
V
Input pull-up current, IIL
E_RXTX,
VIN=0 V, ICE_E=1
10
10
-1
100
100
1
µA
µA
µA
E_RST, CKTEST
Other digital inputs
0
0
VIN = V3P3D
Input pull down current, IIH
ICE_E
10
10
-1
100
100
1
µA
µA
µA
RESET
Other digital inputs
a In battery powered modes, digital inputs should be below 0.3 V or above 2.5 V to minimize battery current.
2.4.2 Output Logic Levels
Table 6: Output Logic Levels
Parameter
Condition
Min
V3P3D–0.4
V3P3D-0.6
0
Typ
Max
Unit
V
Digital high-level output voltage VOH ILOAD = 1 mA
ILOAD = 15 mA
V
Digital low-level output voltage VOL
ILOAD = 1 mA
ILOAD = 15 mA
ISOURCE=1 mA
ISINK=20 mA
0.4
0.8
0.4
0.7
V
V
V
OPT_TX VOH (V3P3D-OPT_TX)
OPT_TX VOL
V
2.4.3 Power-Fault Comparator
Table 7: Power-Fault Comparator Performance Specifications
Parameter
Condition
Min
-20
0.8
Typ
Max
Unit
mV
µA
Offset Voltage: V1-VBIAS
Hysteresis Current: V1
Response Time: V1
+15
1.2
Vin = VBIAS – 100 mV
+100 mV overdrive
Voltage at V1 rising
Voltage at V1 falling
8
37
100
100
µs
µs
10
WDT Disable Threshold: V1-V3P3A
-400
-10
mV
16
Rev. 1.4
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
