78M6612 Data Sheet
DS_6612_001
Initiation of each ADC conversion is controlled by the multiplexer control circuit as described previously.
At the end of each ADC conversion, the FIR filter output data is stored into the CE DRAM location
determined by the multiplexer selection.
1.2.3 FIR Filter
The finite impulse response filter is an integral part of the ADC and it is optimized for use with the
multiplexer. The purpose of the FIR filter is to decimate the ADC output to the desired resolution. At the
end of each ADC conversion, the output data is stored into the fixed CE DRAM location determined by
the multiplexer selection. FIR data is stored LSB justified, but shifted left by nine bits.
1.2.4 Voltage References
The device includes an on-chip precision bandgap voltage reference that incorporates auto-zero
techniques. The reference is trimmed to minimize errors caused by component mismatch and drift. The
result is a voltage output with a predictable temperature coefficient.
The amplifier within the reference is chopper stabilized, i.e. the polarity can be switched by the MPU
using the I/O RAM register CHOP_E (0x2002[5:4]). The two bits in the CHOP_E register enable the MPU
to operate the chopper circuit in regular or inverted operation, or in “toggling” mode. When the chopper
circuit is toggled in between multiplexer cycles, DC offsets on the measured signals will automatically be
averaged out.
The general topology of a chopped amplifier is given in Figure 2.
A
B
A
B
A
Voutp
Vinp
Vinn
+
-
B
A
G
Voutn
B
CROSS
Figure 2: General Topology of a Chopped Amplifier
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as
controlled by CROSS in the “A” position, the output voltage is:
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
With all switches set to the “B” position by applying the inverted CROSS signal, the output voltage is:
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the
output as positive and negative, which results in the offset effectively being eliminated, regardless of its
polarity or magnitude.
When CROSS is high, the hookup of the amplifier input devices is reversed. This preserves the overall
polarity of that amplifier gain, it inverts its input offset. By alternately reversing the connection, the
amplifier’s offset is averaged to zero. This removes the most significant long-term drift mechanism in the
voltage reference. The CHOP_E bits control the behavior of CROSS. The CROSS signal will reverse the
amplifier connection in the voltage reference in order to negate the effects of its offset. On the first CK32
10
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
