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73S8014R-ILR/F 参数 Datasheet PDF下载

73S8014R-ILR/F图片预览
型号: 73S8014R-ILR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 智能卡接口 [Smart Card Interface]
分类和应用: 微控制器和处理器外围集成电路uCs集成电路uPs集成电路光电二极管
文件页数/大小: 29 页 / 309 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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73S8014R Data Sheet  
DS_8014R_012  
Symbol  
Parameter  
Condition  
Min  
Nom  
Max  
Unit  
Interface Requirements – Data Signals: I/Oand host interfaces: I/OUC.  
ISHORTL, ISHORTH, and VINACT requirements do not pertain to I/OUC.  
IOH =0  
0.9 VCC  
0.75 VCC  
0.9 VDD  
VCC+0.1  
VCC+0.1  
VDD+0.1  
VDD+0.1  
0.15 VCC  
0.3  
V
V
Output level, high (I/O)  
IOH = -40μA  
VOH  
IOH =0  
V
Output level, high (I/OUC)  
0.75 VDD  
V
IOH = -40μA  
Output level, low (I/O)  
Output level, low (I/OUC)  
Input level, high (I/O)  
Input level, high (I/OUC)  
Input level, low (I/O)  
V
VOL  
IOL=1mA  
V
VCC+0.30  
VDD + 0.3  
0.2 VCC  
0.8  
0.6 VCC  
1.8  
V
VIH  
V
-0.15  
-0.3  
V
VIL  
Input level, low (I/OUC)  
V
I
OL = 0  
0.1  
V
Output voltage when outside  
of session  
VINACT  
IOL = 1mA  
VIH = VCC  
VIL = 0  
0.3  
V
ILEAK  
IIL  
Input leakage  
10  
μA  
mA  
Input current, low  
0.65  
For output low,  
shorted to VCC  
through 33 Ω  
ISHORTL  
Short circuit output current  
Short circuit output current  
15  
15  
mA  
mA  
For output high,  
shorted to ground  
through 33 Ω  
ISHORTH  
CL = 80pF, 10% to  
90%.  
tR, tF  
Output rise time, fall times  
100  
ns  
tIR, tIF  
RPU  
Input rise, fall times  
1
14  
1
μs  
kΩ  
Output stable for  
>400ns  
Internal pull-up resistor  
8
11  
MHz  
ns  
FDMAX  
TFDIO  
Maximum data rate  
Delay, I/O to I/OUC,  
I/OUC to I/O, (respectively  
falling edge to falling edge  
and rising edge to rising  
edge)  
60  
100  
15  
200  
Edge from master to  
slave, measured at  
50%  
TRDIO  
CIN  
ns  
Input capacitance  
10  
pF  
10  
Rev. 1.0