DS_8010C_024
73S8010C Data Sheet
Typ. Max. Unit
Symbol Parameter
Condition
Min.
Interface Requirements – Data Signals: I/O, AUX1, AUX2, and host interfaces: I/OUC, AUX1UC,
AUX2UC. ISHORTL, ISHORTH, and VINACT requirements do not pertain to I/OUC, AUX1UC, and AUX2UC. IIL
requirements only pertain to I//OUC, AUX1UC, and AUX2UC.
IOH = 0
IOH = -40 µA
IOH = 0
0.9 VCC
0.75 VCC
0.9 VDD
VCC+ 0.1
VCC + 0.1
VDD+ 0.1
VDD + 0.1
0.3
V
V
V
V
V
Output level, high (I/O, AUX1,
AUX2)
VOH
VOH
Output level, high (I/OUC,
AUX1UC, AUX2UC)
0.75 VDD
IOH = -40 µA
IOL=1 mA
VOL
VIH
Output level, low
Input level, high (I/O, AUX1,
AUX2)
1.8
VCC + 0.30
VDD + 0.30
V
V
Input level, high (I/OUC,
AUX1UC, AUX2UC)
VIH
VIL
1.8
Input level, low
-0.3
0.8
0.1
0.3
10
V
V
IOL = 0
Output voltage when outside
of session
VINACT
ILEAK
IIL
IOL = 1 mA
V
Input leakage
VIH = VCC
µA
mA
μA
VIL = 0, CS = 1
VIL = 0, CS = 0
0.65
5
Input current, low
For output low, shorted
to VCC through 33 Ω
ISHORTL
Short circuit output current
15
15
mA
mA
For output high, shorted
to ground through 33 Ω
ISHORTH Short circuit output current
For I/O, AUX1, AUX2,
CL = 80 pF, 10% to 90%
tR, tF
Output rise time, fall times
100
ns
For I/OUC, AUX1UC,
AUX2UC,
CL=50 pF, 10% to 90%
tIR, tIF
RPU
Input rise, fall times
Internal pull-up resistor
Maximum data rate
1
14
1
µs
kΩ
Output stable for >200 ns
8
11
20
MHz
FDMAX
Delay, I/O to I/OUC,
I/OUC to I/O
TFDIO
CIN
ns
Input capacitance
10
pF
Rev. 1.5
19
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
