73S8009R Data Sheet
•
System Controller Interface
•
Five signal images of the card signals
(RSTIN, CLKIN, IOUC, AUX1UC, AUX2UC)
•
Two inputs select card voltage (CMDVCC%,
CMDVCC#)
•
Two Interrupt outputs (OFF, RDY) inform the
system controller of card presence / faults
and the interface status
•
Chip select input (CS)
•
Power down input (PWRDN)
•
DS_8009R_056
Regulator Power Supply (V
PC
):
•
Class A-B-C readers: 5V, 3V and 1.8V
cards: 4.75 V to 6.0 V
Digital Interface (V
DD
): 2.7 V to 3.6 V
6 kV ESD protection on the card interface
SO28 or QFN20 package
•
•
•
FUNCTIONAL DIAGRAM
VDD
[17]
28
VPC
[9]
15
VCC FAULT
VOLTAGE REFERENCE
bias currents
VPC FAULT
vref
LDO
REGULATOR
20
[12]
22
[14]
VCC
GND
CMDVCC5
CMDVCC3
8
[2]
9
[3]
4
[20]
OFF
RDY
PWRDN
CS
10
[4]
RSTIN
11
[5]
CLKIN
12
[6]
13
[7]
1
[18]
CONTROL
LOGIC
RESET
BUFFER
21
[13]
RST
CLOCK
BUFFER
19
[11]
CLK
26
[16]
16
[10]
PRES
PRES
1.5MHz
TEMP FAULT
R-C
OSC.
5
[1]
IOUC
AUX1UC
AUX2UC
6
7
OVER
TEMP
25
[15]
I/O
AUX1
AUX2
SMART CARD I/O BUFFERS
24
23
27
GND
Pin numbers reference the SO28 package
[Pin numbers]
reference the QFN20 Package
Figure 1: 73S8009R Block Diagram
Rev. 1.3
2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
