DS_8009C_025
73S8009C Data Sheet
VPC
See NOTE 2
See NOTE 7
VDD
10µH
VDD_supply_to_uC
C3
See NOTE 3
VBAT
See NOTE 8
10µF
OFF_interrupt_to_uC
See NOTE 1
VBUS
I/OUC_to/from_uC
Pushbutton Switch
AUX1UC_to/from_uC
AUX2UC_to/from_uC
1
2
3
4
5
6
7
8
24
23
ON/OFF
VBUS
I/O
AUX1
AUX2
VCC
I/OUC
AUX1UC
AUX2UC
CMDVCC%
CMDVCC#
RSTIN
CLKIN
RDY
SW1
22
21
20
19
18
17
CMDVCC%_from_uC
CMDVCC#_from_uC
RST
GND
27pF
RSTIN_from_uC
CLKIN_from_uC
RDY_status_to_uC
See
NOTE 6
C5
See
73S80009C
32 QFN
NOTE 5
OFF_ACK_from_uC
OFF_REQ_to_uC
0
27pF
C4
See
NOTE 6
CS_from_uC
VDD
See
NOTE 4
R2
20K
NOTES:
1) VBUS = 4.5V to 5.5V DC.
2) VPC = 2.7V to 6.5V DC (should only be used when VBAT and
0.47µF,
Low ESR (<100mohms)
should be placed near the
SC connecter contact
4.7µF
C2
Card detection
switch is
normally closed
C1
V
BUS are unused)
3) VBAT = 4.0V to 6.5V DC.
4) Internal pull-up allows it to be left open if unused.
5) Resistor footpring is included in case some filtering is needed on CLK
6) Capacitors C4 and C5 are provisional and their footprints should be
added for added noise rejection if necessary.
CLK track should be routed
far from RST, I/O, C4 and C8
Smart Card Connector
7) Inductor must be rated for 400 mA maximum peak current.
8) VDD - 3.3V, +/- 0.3V, 40mA max. Requires min two 0.1µF caps to gnd)
Figure 4: Typical 73S8009C Application Schematic
Rev. 1.4
17
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
