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73S8009CN 参数 Datasheet PDF下载

73S8009CN图片预览
型号: 73S8009CN
PDF下载: 下载PDF文件 查看货源
内容描述: 二合一ISO- 7816和USB通用智能卡接口IC [Combo ISO-7816 and USB Universal Smart Card Interface IC]
分类和应用:
文件页数/大小: 30 页 / 342 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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DS_8009CN_026
Pin
Name
DM
Pin
Number
23
Equivalent
Circuit
73S8009CN Data Sheet
Type
IO
Description
USB D- connection to / from USB controller.
When SC/USB is set low, this pin is electrically
connected to the AUX1 pin, otherwise it is isolated.
Logic low on one or both of these pins will cause the
LDO regulator to ramp the Vcc supply to the smart
card and smart card interface to the value described
in the following table:
CMDVCC%
CMDVCC#
Vcc Output Voltage
0
0
1.8V
0
1
5.0V
1
0
3.0V
1
1
Vcc Off
Note: See Card Power Supply and Voltage
CMDVCC%
CMDVCC#
4
5
I
I
RSTIN
RDY
6
8
I
O
Reset Input: This signal is the reset command to the
card.
Signal to controller indicating the 73S8009CN is
ready because V
CC
is above the required value after
CMDVCC%
and/or
CMDVCC#
is asserted low. A
20kΩ pull-up
resistor to V
DD
is provided internally.
Pull-up is disabled in Power down state and CS=0
modes.
Power control pin. Connected to normally open
SPST switch to ground. Closing switch for duration
greater than de-bounce period will turn 73S8009CN
circuit “on”. If the 73S8009CN is “on,” closing the
switch will turn 73S8009CN to “off” state after the
de-bounce period and OFF_REQ/OFF_ACK
handshake. Can be controlled by a host processor
digital output.
Digital output. Request to the host system controller
to turn the 73S8009CN off. If ON_OFF switch is
closed (to ground) for de-bounce duration and circuit
is “on,” OFF_REQ will go high (request to turn OFF).
Connected to OFF_ACK via 100k
internal resistor.
Setting OFF_ACK high will power “off” all analog
functions and disconnect the 73S8009CN from V
PC
.
The pin has an internal 100kΩ
resistor connection to
OFF_REQ so that when not connected or no host
interaction is required, the Acknowledge will be true
and the circuit will turn “off” after the deactivation
sequence is completed.
Clock signal source for the card clock.
Factory test pin. This pin must be tied to GND.
Factory test pin. This pin must be tied to GND.
ON/OFF
24
I
OFF_REQ
11
O
OFF_ACK
13
I
Miscellaneous
CLKIN
TEST1
TEST2
7
10
30
I
Rev. 1.4
7