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73S1217F-IMR/F 参数 Datasheet PDF下载

73S1217F-IMR/F图片预览
型号: 73S1217F-IMR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 总线供电80515的系统级芯片, USB , ISO 7816 / EMV ,密码键盘和更多 [Bus-Powered 80515 System-on-Chip with USB, ISO 7816 / EMV, PINpad and More]
分类和应用: 多功能外围设备微控制器和处理器时钟
文件页数/大小: 140 页 / 1066 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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73S1217F Data Sheet  
DS_1217F_002  
Smart Card VCC Control/Status Register (VccCtl): 0xFE03 Å 0x00  
This register is used to control the power up and power down of the integrated smart card interface. It is  
used to determine whether to apply 5V, 3V, or 1.8V to the smart card. Perform the voltage selection with  
one write operation, setting both VCCSEL.1 and VCCSEL.0 bits simultaneously. The VDDFLT bit (if  
enabled) will provide an emergency deactivation of the internal smart card slot. See the VDD Fault  
Detect Function section for more detail.  
Table 82: The VccCtl Register  
MSB  
LSB  
SCPWRDN  
VCCSEL.1 VCCSEL.0 VDDFLT  
RDYST  
VCCOK  
Bit  
Symbol  
Function  
Setting non-zero value for bits 7,6 will begin activation sequence with target  
Vcc as given below:  
VccCtl.7  
VCCSEL.1  
State VCCSEL.1  
VCCSEL.0  
VCC  
1
2
3
4
0
0
1
1
0
1
0
1
0V  
1.8V  
3.0V  
5V  
A card event or VCCOK going low will initiate a deactivation sequence.  
When the deactivation sequence for RST, CLK and I/O is complete, VCC will  
be turned off. When this type of deactivation occurs, the bits must be reset  
before initiating another activation.  
VccCtl.6  
VCCSEL.0  
If this bit is set = 0, the CMDVCC3B and CMDVCC5B outputs are  
immediately set = 1 to signal to the companion circuit to begin deactivation  
when there is a VDD Fault event. If this bit is set = 1 and there is a VDD  
Fault, the firmware should perform a deactivation sequence and then set  
CMDVCC3B or CMDVCC5B = 1 to signal the companion circuit to set  
VCC = 0.  
VccCtl.5  
VccCtl.4  
VDDFLT  
RDYST  
If this bit is set = 1, the activation sequence will start when bit VCCOK is  
set = 1. If not set, the deactivation sequence shall start when the VCCTMR  
times out.  
VccCtl.3  
VccCtl.2  
VccCtl.1  
VCCOK  
(Read only). Indicates that VCC output voltage is stable.  
This bit controls the power-off mode of the 73S1217F circuit.  
1 = power off, 0 = normal operation. When in power down mode,  
VDD = 0V. VDD can only be turned on by pressing the ON/OFF switch or by  
application of 5V to VBUS. If VBUS power is available and SCPWRDN bit is  
set, it has no effect until VBUS is removed and VDD will shut off.  
VccCtl.0  
SCPWRDN  
92  
Rev. 1.2  
 
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