DS_1217F_002
73S1217F Data Sheet
Smart Card Interrupt Enable Register (SCIE): 0xFE02 Å 0x00
When set to 1, the respective condition can cause a smart card interrupt. When set to a 0, the respective
condition cannot cause an interrupt. When disabled, the respective bit in the Smart Card Interrupt
register can still be set, but it will not interrupt the MPU.
Table 81: The SCIE Register
MSB
LSB
WTOIEN CDEVEN VTMREN RXDAEN TXEVEN TXSNTEN TXEREN RXEREN
Bit
Symbol
Function
Wait Timeout Interrupt Enable – Enable for ATR or Wait Timeout Interrupt.
In sync mode, function is RLIEN (RLen = max.) interrupt enable.
SCIE.7
WTOIEN
SCIE.6
SCIE.5
SCIE.4
SCIE.3
SCIE.2
SCIE.1
SCIE.0
CDEVEN Card Event Interrupt Enable.
VTMREN VCC Timer Interrupt Enable.
RXDAEN Rx Data Available Interrupt Enable.
TXEVEN TX Event Interrupt Enable.
TXSNTEN TX Sent Interrupt Enable.
TXEREN TX Error Interrupt Enable.
RXEREN RX Error Interrupt Enable.
Rev. 1.2
91
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
