73S1210F Data Sheet
DS_1210F_001
1.5 Special Function Registers (SFRs)
The 73S1210F utilizes numerous SFRs to communicate with the 73S1210Fs many peripherals. This
results in the need for more SFR locations outside the direct address IRAM space (0x80 to 0xFF). While
some peripherals are mapped to unused IRAM SFR locations, additional SFRs for the smart card and
other peripheral functions are mapped to the top of the XRAM data space (0xFC00 to 0xFFFF).
1.5.1 Internal Data Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 6.
Table 6: IRAM Special Function Registers Locations
Bin/
Hex
Hex\Bin
X000
X001
X010
X011
X100
X101
X110
X111
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
80
FF
F7
EF
E7
DF
D7
CF
C7
BF
B7
AF
A7
9F
97
B
A
BRCON
PSW
KCOL
KROW
KSCAN KSTAT KSIZE KORDERL KORDERH
T2CON
IRCON
IEN1
IP1
IP0
S0RELH S1RELH
FLSHCTL
PGADDR
IEN0
S0RELL
S0CON S0BUF
IEN2
DPS
TL0
S1CON S1BUF S1RELL
USR70 UDIR70
ERASE
TH0
TCON
TMOD
SP
TL1
TH1
8F
87
MCLKCtl
DPL
DPH
DPL1
DPH1
WDTREL
PCON
Only a few addresses are used, the others are not implemented. SFRs specific to the 73S1210F are
shown in bold print (gray background). Any read access to unimplemented addresses will return
undefined data, while most write access will have no effect. However, a few locations are reserved and
not user configurable in the 73S1210F. Writes to the unused SFR locations can affect the operation
of the core and therefore must not be written to. This applies to all the SFR areas in both the
IRAM and XRAM spaces. In addition, all unused bit locations within valid SFR registers must be
left in their default (power on default) states.
18
Rev. 1.4
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
