DS_1209F_004
73S1209F Data Sheet
Table 10: Port Registers
R/W Description
SFR
Address
Register
USR70
0x90
R/W Register for User port bit 7:0 read and write operations (pins USR0…
USR7).
UDIR70
0x91
R/W Data direction register for User port bits 0:7. Setting a bit to 0 means that
the corresponding pin is an output.
USR8
0xA0
0xA1
R/W Register for User port bit 8 read and write operations (pin *USR8).
R/W Data direction register for port 1.
UDIR8
All ports on the chip are bi-directional. Each consists of a Latch (SFR USR70 to USR8), an output driver,
and an input buffer, therefore the MPU can output or read data through any of these ports if they are not
used for alternate purposes.
1.6 Instruction Set
All instructions of the generic 8051 microcontroller are supported. A complete list of the instruction set
and of the associated op-codes is contained in the 73S12xxF Software User’s Guide.
1.7 Peripheral Descriptions
1.7.1 Oscillator and Clock Generation
The 73S1209F has a single oscillator circuit for the main CPU clock. The oscillator circuit is designed to
operate with various crystal or external clock frequencies. An internal divider working in conjunction with
a PLL and VCO provides a 96MHz internal clock within the 73S1209F. 96 MHz is the recommended
frequency for proper operation of specific peripheral blocks such as the specific timers, ISO-7816 UART
and interfaces and keypad. The clock generation and control circuits are shown in Figure 3.
Rev. 1.2
23